External Memory Read - LSI LSI53C875A Technical Manual

Pci to ultra scsi controller
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Figure 6.23 External Memory Read
(Driven by System)
FRAME/
(Driven by Master)
(Driven by Master-Addr;
LSI53C875A-Data)
C_BE[3:0]/
(Driven by Master)
(Driven by Master-Addr;
LSI53C875A-Data)
(Driven by Master)
TRDY/
(Driven by LSI53C875A)
STOP/
(Driven by LSI53C875A)
DEVSEL/
(Driven by LSI53C875A)
(Addr driven by LSI53C875A;
Data driven by Memory)
MAS1/
(Driven by LSI53C875A)
MAS0/
(Driven by LSI53C875A)
(Driven by LSI53C875A)
(Driven by LSI53C875A)
MWE/
(Driven by LSI53C875A)
6-36
1
2
CLK
t
1
t
2
t
1
AD
Addr
In
t
2
t
1
CMD
t
2
t
1
PAR
In
t
1
IRDY/
t
3
MAD
MCE/
MOE/
Electrical Specifications
3
4
5
6
Byte Enable
t
2
Upper
Middle
Address
Address
t
t
11
12
t
13
7
8
9
Lower
Address

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