6.3 AC Characteristics
Table 6.12
External Clock
Symbol
Parameter
t
Bus clock cycle time
1
SCSI clock cycle time (SCLK)
t
CLK LOW time
2
SCLK LOW time
t
CLK HIGH time
3
SCLK HIGH time
t
CLK slew rate
4
SCLK slew rate
1. Timings are for an external 40 MHz clock.
2. This parameter must be met to ensure SCSI timings are within specification.
3. Duty cycle not to exceed 60/40.
The AC characteristics described in this section apply over the entire
range of operating conditions (refer to the
Chip timings are based on simulation at worst case voltage, temperature,
and processing. Timing was developed with a load capacitance of 50 pF.
Table 6.12
and
Figure 6.6
1
3
3
3
3
Figure 6.6
External Clock
CLK, SCLK 1.4 V
AC Characteristics
provide external clock timing data.
2
t
1
t
3
t
2
t
4
DC Characteristics
Min
Max
30
DC
25
60
10
–
6
33
12
–
10
33
1
–
1
–
section).
Unit
ns
ns
ns
ns
ns
ns
V/ns
V/ns
6-9