Slow Memory ( 128 Kbytes) Write Cycle - LSI LSI53C875A Technical Manual

Pci to ultra scsi controller
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Table 6.34

Slow Memory ( 128 Kbytes) Write Cycle

Symbol
Parameter
t
Address setup to MAS/ HIGH
11
t
Address hold from MAS/ HIGH
12
t
MAS/ pulse width
13
t
Data setup to MWE/ LOW
20
t
Data hold from MWE/ HIGH
21
t
MWE/ pulse width
22
t
Address setup to MWE/ LOW
23
t
MCE/ LOW to MWE/ HIGH
24
t
MCE/ LOW to MWE/ LOW
25
t
MWE/ HIGH to MCE/ HIGH
26
Figure 6.30 Slow Memory ( = 128 Kbytes) Write Cycle
CLK
MAD
(Driven by LSI53C875A)
MAS1/
(Driven by LSI53C875A)
MAS0/
(Driven by LSI53C875A)
MCE/
(Driven by LSI53C875A)
MOE/
(Driven by LSI53C875A)
MWE/
(Driven by LSI53C875A)
Higher
Middle
Address
Address
t
11
PCI and External Memory Interface Timing Diagrams
Lower
Address
t
12
t
13
t
25
t
20
t
23
Min
Max
25
15
25
30
20
100
60
120
25
25
Valid Write Data
t
24
t
22
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
26
t
21
6-49

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