Slow Memory ( 128 Kbytes) Read Cycle - LSI LSI53C875A Technical Manual

Pci to ultra scsi controller
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Slow Memory ( = 128 Kbytes) Read Cycle
Table 6.33
Symbol
Parameter
t
Address setup to MAS/ HIGH
11
t
Address hold from MAS/ HIGH
12
t
MAS/ pulse width
13
t
MCE/ LOW to data clocked in
14
t
Address valid to data clocked in
15
t
MOE/ LOW to data clocked in
16
t
Data hold from address, MOE/, MCE/ change
17
t
Address out from MOE/, MCE/ HIGH
18
t
Data setup to CLK HIGH
19
Figure 6.29 Slow Memory ( = 128 Kbytes) Read Cycle
CLK
MAD
(Address driven by LSI53C875A;
Data driven by Memory)
MAS1/
(Driven by LSI53C875A)
MAS0/
(Driven by LSI53C875A)
MCE/
(Driven by LSI53C875A)
MOE/
(Driven by LSI53C875A)
MWE/
(Driven by LSI53C875A)
6-48
Higher
Middle
Address
Address
t
12
t
11
t
13
Electrical Specifications
Lower
Address
t
15
Min
Max
25
15
25
150
205
100
0
50
5
Valid Read Data
t
17
t
19
t
14
t
t
16
18
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns

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