Parallel Rom Support - LSI LSI53C875A Technical Manual

The LSI53C875A supports a variety of sizes and speeds of expansion
ROM, using pull-down resistors on the MAD[3:0] pins. The encoding of
pins MAD[3:1] allows the user to define how much external memory is
available to the LSI53C875A.
associated with the possible values of MAD[3:1]. The MAD[3:1] pins are
fully described in Chapter 3, "Signal Descriptions."
Table 2.6

Parallel ROM Support

MAD[3:1]
000
001
010
011
100
101
110
111
To use one of the configurations mentioned above in a host adapter
board design, put 4.7 k
corresponding to the available memory space. For example, to connect
to a 64 Kbyte external ROM, use a pull-up on MAD2. If the external
memory interface is not used, MAD[3:1] should be pulled HIGH.
Note: There are internal pull-downs on all of the MAD bus
signals.
The LSI53C875A allows the system to determine the size of the available
external memory using the
PCI configuration space. For more information on how this works, refer
to the PCI specification or the
description in Chapter 4, "Registers."
MAD0 is the slow ROM pin. When pulled up, it enables two extra clock
cycles of data access time to allow use of slower memory devices. The
external memory interface also supports updates to flash memory.
Parallel ROM Interface
Table 2.6 shows the memory space
Available Memory Space
16 Kbytes
32 Kbytes
64 Kbytes
128 Kbytes
256 Kbytes
512 Kbytes
1024 Kbytes
no external memory present
pull-up resistors on the MAD pins
Expansion ROM Base Address
Expansion ROM Base Address
register in the
register
2-49