B.2 64 Kbyte Interface With 150 Ns Memory - LSI LSI53C875A Technical Manual

Pci to ultra scsi controller
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Figure B.2
64 Kbyte Interface with 150 ns Memory
GPIO4
MWE/
MOE/
MCE/
MAD[7:0]
LSI53C875A
MAS0/
MAS1/
Note: MAD 3, 1, 0 pulled LOW internally. MAD bus sense logic enabled for 64 Kbyte of fast memory (150 ns
devices @ 33 MHz).
B-2
+ 12 V
Control
Bus
MAD2
4.7 K
D0
8
HCT374
D7
CK
D0
6
HCT374
D7
CK
External Memory Interface Diagram Examples
Optional - for Flash Memory only, not
required for EEPROMS.
VPP
VPP
A[7:0]
V
DD
Q0
8
Q7
QE
Q0
Q7
QE
WE
OE
CE
D[7:0]
27C512-15/
A[15:8]
28F512-15/
Socket

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