A.2 Lsi53C875A Scsi Register Map - LSI LSI53C875A Technical Manual

Table A.1 LSI53C875A PCI Register Map (Cont.)
Register Name
Power Management Capabilities (PMC)
Power Management Control/Status (PMCSR)
Reserved
Reserved
Revision ID (Rev ID)
Status
Subsystem ID
Subsystem Vendor ID
Vendor ID
Table A.2 LSI53C875A SCSI Register Map
Register Name
Adder Sum Output (ADDER)
Chip Control 0 (CCNTL0)
Chip Control 1 (CCNTL1)
Chip Test Five (CTEST5)
Chip Test Four (CTEST4)
Chip Test One (CTEST1)
Chip Test Six (CTEST6)
Chip Test Three (CTEST3)
Chip Test Two (CTEST2)
Chip Test Zero (CTEST0)
Cumulative SCSI Byte Count (CSBC)
Data Structure Address (DSA)
DMA Byte Counter (DBC)
A-2 Register Summary
Address
0x42–0x43
0x44–0x45
0x28–0x2B
0x35–0x3B
0x08
0x06–0x07
0x2E–0x2F
0x2C–0x2D
0x00–0x01
Address Read/Write
0x3C–0x3F Read Only
0x56 Read/Write
0x57 Read/Write
0x22 Read/Write
0x21 Read/Write
0x19 Read Only
0x23 Read/Write
0x1B Read/Write
0x1A Read Only (bit 3 write) 4-54
0x18 Read/Write
0xDC–0xDF Read/Write
0x10–0x13 Read/Write
0x24–0x26 Read/Write
Read/Write Page
Read Only 4-15
Read/Write 4-16
– 4-10
– 4-13
Read Only 4-6
Read/Write 4-5
Read Only 4-11
Read Only 4-10
Read Only 4-2
Page
4-73
4-95
4-97
4-60
4-59
4-53
4-62
4-56
4-53
4-108
4-47
4-62