Effects Of Interrupt Serialization; Registers - Motorola MVME2400 Series Programmer's Reference Manual

architecture should recommend that, if the task priority register is not
implemented with the processor, the task priority register should only be
updated when the processor enters or exits an idle state.
Only when the task priority register is integrated within the processor, such
that it can be accessed as quickly as the MSRee bit, for example, should
the architecture require the task priority register be updated synchronously
with instruction execution.

Effects of Interrupt Serialization

All external interrupt sources that are level sensitive must be negated at
least N PCI clocks prior to doing an EOI cycle for that interrupt source,
where N is equal to the number of PCI clocks necessary to scan in the
external interrupts. In the example shown, 16 external interrupts are
scanned in, N = 16. Serializing the external interrupts cause's a delay
between the time that the external interrupt source changes level and when
MPIC logic actually see's the change. Spurious interrupts can result if an
EOI cycle occurs before the interrupt source is seen to be negated by MPIC
logic.

Registers

This section provides a detailed description of all PHB registers. The
section is divided into two parts: the first covers the PPC Registers and the
second part covers the PCI Configuration Registers. The PPC Registers are
accessible only from the PPC bus using any single beat valid transfer size.
The PCI Configuration Registers reside in PCI configuration space. These
are primarily accessible from the PPC bus by using the
CONFIG_ADDRESS and CONFIG_DATA registers. The
are described first; the
discussion of the
It is possible to place the base address of the PPC registers at either
$FEFF0000 or $FEFE0000. Having two choices for where the base
registers reside allows the system designer to use two of the Hawk's PCI
Host Bridges connected to one PPC60x bus. Please refer to the section
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PCI Registers are described next. A complete
MPIC Registers can be found later in this chapter.
Registers
2
PPC Registers
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