Motorola MVME2400 Series Programmer's Reference Manual page 259

Table 3-18. Deriving tras, trp, trcd and trc Control Bit Values from SPD Information
Control Bits Parameter
$FEF800D2 tRCD
bit 7 (SPD Byte 29)
(trcd)
$FEF800D0 tRC
bits 5,6,7 (SPD Bytes 30
and 27)
(trc)
Notes
1. Use tRAS from the SDRAM block that has the slowest tRAS.
2. tRAS_CLK is tRAS expressed in CLK periods.
3. Use tRP from the SDRAM block that has the slowest tRP.
4. tRP_CLK is tRP expressed in CLK periods.
5. Use tRCD from the SDRAM block that has the slowest tRCD.
6. tRCD_CLK is tRCD expressed in CLK periods.
7. Use tRC from the SDRAM block that has the slowest tRC.
8. tRC_CLK is tRC expressed in CLK periods.
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(Continued)
Parameter Expressed Possible Control Bit Values
in CLK Periods
0.0 < tRCD_CLK <= 2
tRCD_CLK = tRCD/T
2.0 < tRCD_CLK <= 3
(T = CLK Period
3 < tRCD_CLK
in nanoseconds)
See Notes 5, 6 and 9
9.0 < tRC_CLK <= 10.0
tRC_CLK = (tRAS +
tRP)/T
(T = CLK Period
in nanoseconds)
See Notes 7, 8 and 9
Software Considerations
0.0 < tRC_CLK <= 6.0
6.0 < tRC_CLK <= 7.0
7.0 < tRC_CLK <= 8.0
8.0 < tRC_CLK <= 9.0
10.0 < tRC_CLK <=
11.0
11.0 < tRC_CLK
3
trcd =%0
trcd =%1
Illegal
trc =%110
trc =%111
trc =%000
trc =%001
trc =%010
trc =%011
illegal
3-79