Motorola MVME2400 Series Programmer's Reference Manual page 32

Board Description and Memory Maps
1
Table 1-3. CHRP Memory Map Example (Continued)
Processor Address
Start
FF00 0000 FF7F FFFF
FF80 0000 FF8F FFFF
FF90 0000 FFEF FFFF
FFF0 0000 FFFF FFFF
Notes
1-8
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Size
End
8M
1M
6M
1M
1. Programmable via the Hawk ASIC. For the MVME2400 series,
RAM size is limited to 256MB and ROM/FLASH to 9MB.
2. To enable the "Processor-hole" area, program the SMC to ignore
0x000A0000 - 0x000BFFFF address range and program the PHB to
map this address range to PCI memory space.
3. Programmable via PHB.
4. CHRP requires the starting address for the PCI memory space to be
256MB-aligned.
5. Programmable via PHB for either contiguous or spread-I/O mode.
6. The actual size of each ROM/FLASH bank may vary.
7. The first one Mbyte of ROM/FLASH Bank A appears at this range
after a reset if the rom_b_rv control bit is cleared. If the rom_b_rv
control bit is set, then this address range maps to ROM/FLASH
Bank B.
8. This range can be mapped to the VMEbus by programming the
Universe II ASIC accordingly. The map shown is the recommended
setting which uses the Special PCI Slave Image and two of the four
programmable PCI Slave Images.
Definition
ROM/FLASH Bank A
ROM/FLASH Bank B
Reserved
ROM/FLASH Bank A or Bank B
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Notes
1,6
1,6
7