Interprocessor Interrupt Dispatch Registers; Interrupt Task Priority Registers - Motorola MVME2400 Series Programmer's Reference Manual
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Also See for MVME2400 Series:
- Installation and use manual (175 pages) ,
- Installation and user manual (20 pages)
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Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
Interprocessor Interrupt Dispatch Registers
2
Offset
Processor 0 $20040, $20050, $20060, $20070
Processor 1 $21040, $21050, $21060, $21070
Bit
3
3
1
0
Name
IPI DISPATCH
Operation
R
Reset
$00
There are four Interprocessor Interrupt Dispatch Registers. Writing to an
IPI Dispatch Register with the P0 and/or P1 bit set causes an interprocessor
interrupt request to be sent to one or more processors. Note that each IPI
Dispatch Register has two addresses. These registers are considered to be
per processor registers and there is one address per processor. Reading
these registers returns zeros.
Interrupt Task Priority Registers
Offset
Processor 0 $20080
Processor 1 $21080
Bit
3
3
1
0
Name
INTERRUPT TASK PRIORITY
Operation R
Reset
$00
2-120
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2
2
2
2
2
2
2
2
2
2
1
9
8
7
6
5
4
3
2
1
0
9
R
$00
P1 (Processor 1) The interrupt is directed to processor 1.
P0 (Processor 0) The interrupt is directed to processor 0.
2
2
2
2
2
2
2
2
2
2
1
9
8
7
6
5
4
3
2
1
0
9
R
$00
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0 9 8 7 6 5 4 3 2 1 0
R
$00
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0 9 8 7 6 5 4 3 2 1 0
R
$00
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R
$00
TP
R
R/W
$0
$F
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