External Interrupts; Schematic Diagram Of The User Interrupt Interface - Motorola DSP56F826EVM Hardware User Manual

Table 2-6. Parallel JTAG Interface Connector Description
Pin #
10
11
12
13

2.9 External Interrupts

Two on-board push-button switches are provided for external interrupt generation, as
shown in 2-7. SW2 allows the user to generate a hardware interrupt for signal line
Figure
IRQA. SW3 allows the user to generate a hardware interrupt for signal line IRQB. These
two switches allow the user to generate interrupts for his user-specific programs.
Figure 2-7. Schematic Diagram of the User Interrupt Interface
2-10
Freescale Semiconductor, Inc.
Signal
9 PORT_VCC
NC
PORT_TDO
NC
PORT_CONNECT
+3.3V
SW2
0.1µF
SW3
0.1µF
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P2
Pin # Signal
22 GND
23 GND
24 GND
25 GND
56F826
10K
IRQA
+3.3V
10K
IRQB
MOTOROLA