Revision Id/ General Control Register - Motorola MVME2400 Series Programmer's Reference Manual

System Memory Controller (SMC)

Revision ID/ General Control Register

Address
$FEF80008
Bit
3
Name
Operation
Reset
3-40
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
REVID
READ ONLY
$01
tben en (tben_en) controls the enable for the p1_tben and p0_tben
output signals. When tben_en is set, the I
p1_tben output pin and the ercs_output pin becomes the p0_tben
output pin. Also, the SMC does not respond to accesses that fall within
the external register set address range except for the address
$FEF88300. When tben_en is cleared, the I
retain their normal function and the SMC does respoond to external
register set accesses.
Software should only set the tben_en bit when there is no external L2
2
cache connected to the I Clm_ pin and when there is no external
register set.
REVID The REVID bits are hard-wired to indicate the revision level
of the SMC. The value for the first revision is $01.
aonly_en Normally, the SMC responds to address-only cycles only if
they fall within the address range of one of its enabled map decoders.
When the aonly_en bit is set, the SMC also responds to address-only
cycles that fall outside of the range of its enabled map decoders
provided they are not acknowledged by some other slave within 8
clock periods. aonly_en is read-only and reflects the level that was on
the RD4 pin at power-up reset time.
2
Clm_ input pin becomes the
2
Clm_ and ercs_ pins
Computer Group Literature Center Web Site