Motorola MVME2400 Series Programmer's Reference Manual page 321

decoder
priorities 2-21
decoders
address PCI to PPC 2-5
for PCI to PPC addressing
PPC to PCI 2-7
default PCI memory map 1-12
default processor memory map
delayed transactions
PCI Slave 2-24
derc 3-47
device selection 2-24
Disable Error Correction control bit
DMA controller 4-7
documentation, related A-1,
double word, definition x
DRAM enable bits 3-42
DRAM size control bits 3-42
E
ECC
SMC 3-15
ECC Codes
Hawk 3-86
ECC codes 3-86
ECC Control Register
SMC 3-45
EEPROM access 3-76
elog 3-49
embt 3-49
emulated Z8536 access registers
emulated Z8536 CIO registers and port pins
1-32
Endian Conversion 2-38
endian conversion 2-38
endian issues
MVME2400 5-10
End-of-Interrupt Registers 2-122
Error Address Register
SMC 3-50
error correction 3-15
Error Correction Codes 3-86
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error detection
error handling
Error Logger Register
SMC
2-19 error logging
SMC
error notification and handling
1-6 Hawk
error reporting
ERROR_ADDRESS
ERROR_SYNDROME
esbt 3-49
3-47 escb 3-49
esen 3-49
B-1 exceptions
MVME2400
exclusive access
PCI Slave
External Register Set
SMC 3-34,
external register set reads and writes
External Source Destination Registers
External Source Vector/Priority Registers
F
Falcon ECC Memory Controller chip set
false, definition
fast back-to-back transactions
PCI Slave
1-33 Feature Reporting Register
features
SMC
FIFO
from PPC Slave to PCI Master
with PCI Slave
FIFO structure
explained
Flash (see ROM/Flash)
four-beat reads/writes
functional description
Hawk PHB
3-15
2-41
3-49
3-49
3-17
3-17
5-9
5-9
3-16
3-50
3-50
5-7
2-29
2-25
3-72
2-116
x
2-29
2-25
2-108
2-1
3-1
2-9
2-26
2-4
3-17
3-6
1-5
2-4
3-35
2-118
3-1
I
N
D
E
X
IN-3