Motorola MVME2400 Series Programmer's Reference Manual page 319

Numerics
16550 access registers 1-25
16550 UART 1-25
32-Bit Counter 3-71
SMC 3-71
8259 interrupts
PIB 5-4
A
AACK
as used with PPC Slave
access timing (ROM) 3-10
address
decoders PPC to PCI 2-7
limits on PHB map decoding
address decoders
PCI to PPC 2-5
address mapping
PPC 2-5
address modification for little endian trans-
fers 2-40
address offsets
as part of map decoders
address parity
PPC60x 3-13
Address Parity Error Address Register
SMC 3-71
Address Parity Error Log Register
SMC 3-70
address pipelining 3-7
address transfers 3-12
address/data stepping 2-29
addressing
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to PCI Slave
addressing mode
for PCI Master
PCI Slave limits
Application-Specific
arbiter
as controlled by the XARB register
Hawk's internal
PPC 2-15,
2-7 arbitration
from PCI Master
arbitration latency
arbitration parking
2-6 architectural diagram for the Universe
architectural overview
Universe II
ARTRY_
assertion, definition
asterisk (*)
as denotes signal level
B
2-21
big to little endian data swap
big-endian
big-endian mode
binary number
bit descriptions
bit ordering convention
SMC
block diagram
SMC poriton of Hawk
block diagrams
Index
2-23
2-28
2-24
Integrated
(ASIC) 1-1
2-34
2-16
2-29
2-29
2-37
2-4
4-2
3-14
x
ix
2-39
x
5-11
ix
3-38
3-1
2-3
3-2
Circuit
2-16
4-3
IN-1