Error_Address Register - Motorola MVME2400 Series Programmer's Reference Manual

System Memory Controller (SMC)
3

Error_Address Register

Address
$FEF80038
Bit
Name
ERROR_ADDRESS
Operation
READ ONLY
Reset
0 P
3-50
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ERR_SYNDROME ERR_SYNDROME reflects the syndrome
value at the last logging of an error. This eight-bit code indicates the
position of the data error. When all the bits are zero, there was no error.
Note that if the logged error was multiple-bit then these bits are
meaningless. Refer to the section on
syndromes.
esblk0,esblk1, esbik2 Together these three bits indicate which block
of SDRAM was being accessed when the SMC logged a scrub error.
esblk0,esblk1, esbik2 are 0,0,0 for Block A; 0,0,1 for Block B; 0,1,0
for Block C; and 0,1,1 for Block D, etc.
scof scof is set by the SBE COUNT register rolling over from $FF to
$00. It is cleared by software writing a 1 to it.
SBE COUNT SBE_COUNT keeps track of the number of single-bit
errors that have occurred since it was last cleared. It counts up by one
each time it detects a single-bit error (independent of the state of the
elog bit). The SBE_COUNT is cleared by power-up reset and by
software writing all zeros to itself. When SBE COUNT rolls over
from $FF to $00, the SMC sets the scof bit. The rolling over of
SBE_COUNT pulses the internal interrupt signal, SMC_INT, low if
the scien bit is set.
ERROR_ADDRESS These bits reflect the value that corresponds to
bits 0-28 of the PPC60x address bus when the SMC last logged an
error during a PowerPC access to SDRAM. They reflect the value of
the SCRUB ADDRESS counter if the error was logged during a scrub
cycle.
ECC Codes for a decoding of the
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