Motorola MVME2400 Series Programmer's Reference Manual page 329

related B-4
specifications, related B-4
Speculative PCI Request 2-47
spread I/O addressing
as function of PHB 2-31
Spurious Vector Register 2-112
SRAM base address 3-35
status bit descriptions 3-38
status bit, definition x
swen 3-51
switch
S3 1-26
switches
software readable 1-26
syndrome codes ordered by bit in error
System Configuration Information
T
TA
as used with PPC Slave
Table 2-10
Table 2-2. 2-10
target initiated termination
2-24
tben Register
SMC 3-73
Timer Basecount Registers 2-114
Timer Current Count Registers
Timer Destination Registers
Timer Frequency Register 2-112
Timer Vector/Priority Registers
timing (ROM/Flash access)
transaction
burst 2-8
instance of interrupt 2-8
transaction ordering 2-47
transactions
compelled 2-7
PCI originated/PPC bound described
posted 2-7
PPC originated/PCI bound described
PPC Slave limits 2-8
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unable to retry
transfer types
generated by PPC Master
PCI command code dependent
PPC60x bus
triple- (or greater) bit error
true, definition
U
UART
UCSR access mechanisms
Universe (VMEbus to PCI) chip
Universe as PCI master
Universe as PCI slave
Universe as VMEbus master
3-86
Universe as VMEbus slave
1-23
Universe chip problems after a PCI reset
Universe II
function described
2-7 Universe II ASIC
programming for VME Register info.
Universe II PCI Register Values
CHRP Memory Map
PREP Memory Map
Universe II register map
Universe's involvement
2-113
with endian issues
2-116 URLs (uniform resource locators)
V
2-115
Vendor ID/ Device ID Registers
3-10
Vendor ID/Device ID Registers
Vendor Identification Register
Vendor/Device Register
SMC
Vital Product Data (VPD) 1-23,
VME
2-4
VME Registers
VME registers
2-4
VMEbus
2-8
2-14
2-14
2-14
3-16
x
1-25
4-8
4-1
4-6
4-5
4-4
4-4
4-1
1-27
1-14
1-17
4-9
5-14
B-8
2-92
2-67
2-110
3-39
A-1
Geographical Address
(VGAR) 1-32
1-27
1-27
5-8
I
N
Register
D
E
X
IN-11