Tben Register - Motorola MVME2400 Series Programmer's Reference Manual

Vme processor module
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Note

tben Register

Address
$FEF88300
Bit
Name
Operation
Reset
The tben Register is only enabled when the tben_en bit in the Revision
ID/General Control Register is set. When tben_en is cleared, the External
Register Set interface is enabled and appears in its designated range. When
tben_en is set, the External Register Set interface is disabled and the SMC
does not respond to accesses in its designated range except that it responds
to the address of this, tben register.
p1_tben When the tben_en bit is set, the L2CLM_ input pin becomes
the P1_TBEN output pin and it tracks the value on p1_tben. When
p1_tben is 0, the P1_TBEN pin is low and when p1_tben is 1, the
P1_TBEN pin is high.
When the tben_en bit is cleared, p1_tben has no effect on any pin.
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4. Block C is never used for reset vectors.
5. Block C is always enabled unless the tben_en bit is set.
6. Writes to Block C cannot be disabled.
The fact that the assumed width is 64 bits does not require that all
64 bits have to be used. The system designer can connect the
needed width device to the bits desired for the application.
Devices less than 64 bits will cause holes for addresses
corresponding to non-connected bits.
READ ZERO
X
Programming Model
READ ZERO
READ ZERO
X
X
3
3-73

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