Vme Registers; Table 1-16. Mk48T59/559 Access Registers - Motorola MVME2400 Series Programmer's Reference Manual

and the NVRAM/RTC Data Port Register. The NVRAM/RTC Address
Strobe 0 Register latches the lower 8 bits of the address and the
NVRAM/RTC Address Strobe 1 Register latches the upper 5 bits of the
address.

Table 1-16. MK48T59/559 Access Registers

PCI I/O Address
0000 0074
0000 0075
0000 0077
The NVRAM and RTC is accessed through the above three registers.
When accessing a NVRAM/RTC location, follow the following
procedure:
1. Write the low address (A7-A0) of the NVRAM to the
NVRAM/RTC STB0 register,
2. Write the high address (A15-A8) of the NVRAM to the
NVRAM/RTC STB1 register, and
3. Then read or write the NVRAM/RTC Data Port.
Refer to the M48T59 Data Sheet for additional details and programming
information.

VME Registers

The following registers provide the following functions for the VMEbus
interface: a software interrupt capability, a location monitor function, and
a geographical address status. For these registers to be accessible from the
VMEbus, the Universe II ASIC must be programmed to map the VMEbus
Slave Image 0 into the appropriate PCI I/O address range. Refer to the
VMEbus Slave Map
shows the registers provided for various VME functions:
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Function
NVRAM/RTC Address Strobe 0 (A7 - A0)
NVRAM/RTC Address Strobe 1 (A15 - A8)
NVRAM/RTC Data Register
section for additional details. The following table
ISA Local Resource Bus
1-27
1