I2C Page Write - Motorola MVME2400 Series Programmer's Reference Manual

I2C Page Write

2
The I C page write is initiated the same as the I
of sending a stop sequence after the first data word, the I
controller will transmit more data words before a stop sequence is
generated. The first step in the programming sequence should be to test the
i2_cmplt bit for the operation-complete status. The next step is to initiate
a start sequence by first setting the i2_start and i2_enbl bits in the I
Control Register and then writing the device address (bits 7-1) and write
bit (bit 0=0) to the I
automatically clear with the write cycle to the I
Register. The I
and i2_ackin bits. The i2_cmplt bit becomes set when the device address
and write bit have been transmitted, and the i2_ackin bit provides status as
to whether or not a slave device acknowledged the device address. With
the successful transmission of the device address, the initial word address
will be loaded into the I
the slave device. Again, i2_cmplt and i2_ackin bits must be tested for
proper response. After the initial word address is successfully transmitted,
the first data word loaded into the
transferred to the initial address location of the slave device. After
i2_cmplt and i2_ackin bits have been tested for proper response, the next
data word loaded into the I
to the next address location of the slave device, and so on, until the block
transfer is complete. A stop sequence then must be transmitted to the slave
device by first setting the i2_stop and i2_enbl bits in the I
Register and then writing a dummy data (data=don't care) to the I
Transmitter Data Register. The
test i2_cmplt bit for the operation-complete status. The stop sequence will
initiate a programming cycle for the serial EEPROM and also relinquish
the ASIC master's possession of the I
http://www.motorola.com/computer/literature
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
2
C Transmitter Data Register. The i2_cmplt bit will be
2
C Status Register must now be polled to test the i2_cmplt
2
C Transmitter Data Register to be transmitted to
I2C Transmitter Data Register
2
C Transmitter Data Register will be transferred
I2C Status Register
2
C bus.
Functional Description
2
C byte write, but instead
2
C master
2
C
2
C Transmitter Data
will be
2
C Control
2
C
must now be polled to
3-29
3