Sdram Enable And Size Register (Blocks A, B, C, D) - Motorola MVME2400 Series Programmer's Reference Manual

isa_hole When it is set, isa_hole disables any of the SDRAM or
ROM/Flash blocks from responding to PowerPC accesses in the range
from $000A0000 to $000BFFFF. This has the effect of creating a hole
in the SDRAM memory map for accesses to ISA. When isa_hole is
cleared, there is no hole created in the memory map.
pu_stat0-pu_stat3 pu_stat0, pu_stat1, pu_stat2, and pu_stat3 are
read-only status bits that indicate the levels that were on the RD13,
RD14, RD15, and RD16 signal pins respectively at power-up reset.
They provide a means to pass information to software using pull-
up/pull-down resistors on the RD bus or on a buffered RD bus.

SDRAM Enable and Size Register (Blocks A, B, C, D)

Address
$FEF80010
Bit
Name
Operation
Reset
Writes to this register must be enveloped by a period of time in which no
accesses to SDRAM occur. The requirements of the envelope are that all
SDRAM accesses must have completed before the write starts and none
should begin until after the write is done. A simple way to do this is to
perform at least two read accesses to this or another register before and
after the write.
Additionally, sometime during the envelope, before or after the write, all
of the SDRAMs' open pages must be closed and the Hawk's open page
tracker reset. The way to do this is to allow enough time for at least one
SDRAM refresh to occur by waiting for the 32-bit counter (see
Register Bit Descriptions
100 times. The wait period needs to happen during the envelope.
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further on in this chapter) to increment at least
Programming Model
Detailed
3-41
3