Motorola MVME2400 Series Programmer's Reference Manual page 82

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
The PCI Slave only honors the Linear Incrementing addressing mode. The
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PCI Slave performs a disconnect with data if any other mode of addressing
is attempted.
Device Selection
The PCI slave will always respond valid decoded cycles as a medium
responder.
Target Initiated Termination
The PCI Slave normally strives to complete transactions without issuing
disconnects or retries. There are four exceptions where the PCI Slace
performs a disconnect:
There are two exceptions where the PCI Slave performs a retry (disconnect
with no data transfer):
Delayed Transactions
The PCI Slave does not participate in the delayed transaction protocol.
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All burst configuration cycles are terminated with a disconnect after
one data beat has been transferred.
All transactions that have a byte enable hole are disconnected.
All transactions attempting to perform non-linear addressing mode
are terminated with a disconnect after one data beat is transferred.
A transaction that crosses from a valid PHB deode space to an
invalid PHB decode space is disconnected. Note that this does not
include crossing contiguous multiple map decoder space, in which
case PHB does not issue a disconnect.
While within a lock sequence, the PCI Slave retries all non-locking
masters.
At the completion of a lock sequence between the times the two
locks are released on the PCI bus and the PPC bus. All accesses to
the PCI Slave regardless of who is the master will be retried.
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