Ppc Error Attribute Register - Motorola MVME2400 Series Programmer's Reference Manual

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller

PPC Error Attribute Register

2
The Error Attribute Register (EATTR) captures attribute information on
the various errors that the PHB can detect. If the XDPE, PPER, or PSER
bits are set in the ESTAT register, the contents of the EATTR register are
zero. If the XBTO bit is set the register is defined by the following figure:
Address $FEFF002C
Bit
0 1 2 3 4 5 6 7 8 9
Name
Operation R
Reset $00
If the PSMA or PRTA bits are set, the register is defined in the following
table:
2-82
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1 1 1 1
0 1 2 3
R
$00
XIDx (PPC Master ID) This field contains the ID of the PPC master
which originated the transfer in which the error occurred. The
encoding scheme is identical to that used in the GCSR register.
TBST (Transfer Burst) This bit is set when the transfer in which the
error occurred was a burst transfer.
TSIZx (Transfer Size) This field contains the transfer size of the PPC
transfer in which the error occurred.
TTx (Transfer Type) This field contains the transfer type of the PPC
transfer in which the error occurred.
1 1 1 1 1 1 2 2 2 2 2
4 5 6 7 8 9 0 1 2 3 4
EATTR
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2 2 2 2 2 3 3
5 6 7 8 9 0 1