HPE ProLiant DL325 Gen11 User Manual page 24

Item Item Description Description
1 PCI Express version
2 Physical connector link width
3 Negotiable link width
Accelerator slot numbering Accelerator slot numbering
This server supports accelerator installation in the front-end GPU riser cage and the rear-end primary riser cage. All accelerator-compatible
slots are PCIe5 x16.
Accelerator in the primary riser cage Accelerator in the primary riser cage
The primary riser cage supports a full-height, full-length, single-width accelerator.
Accelerator-optimized 4 SFF NVMe drive configurations Accelerator-optimized 4 SFF NVMe drive configurations
Single-width accelerator numbering
Definition Definition
Each PCIe version corresponds to a specific data transfer rate between
the processor and peripheral devices. Generally, a version update
corresponds to an increase in transfer rate.
PCIe 1.x
PCIe 2.x
PCIe 3.x
PCIe 4.x
PCIe 5.x
The PCIe technology is under constant development. For the latest
information, see the PCI-SIG website PCI-SIG website.
PCIe devices communicate through a logical connection called an
interconnect or link. At the physical level, a link is composed of one or
more lanes. The number of lanes is written with an x prefix with x16
being the largest size in common use.
x1
x2
x4
x8
x16
These numbers correspond to the maximum link bandwidth supported by
the slot.
HPE ProLiant DL325 Gen11 Server User Guide 24