Appendix F
Continuous Tests
Watchdog Timer
Each CPU contains a watchdog timer to check that the V
functioning. If the timer detects no activity, it will turn on a signal (SYSFAIL) on
the VME backplane. This will disable HIGH POWER.
Drive Faults
The controller continuously monitors fault signals from each servo-amplifier.
Adept amplifiers check motor open circuit, over current, voltage sag, and
amplifier temperature.
RSC Watchdog Timer
The RSC (in Adept robots) contains a watchdog timer to monitor its operation and
to detect power failures.
Encoder Signals
The position-feedback signals from the robot are continuously monitored for
quadrature and index errors. MI3/MI6 systems include an optional test for loss of
differential encoder signals.
+
V
FREE Command
The user can issue the V
+
of the V
operating system, Vision, and Servo code area of RAM. It validates data
structures where user program data resides. During null time a simple check on
CPU diagnostics is performed.
+
V
Cycle Tests
Communication between V
communication is lost, arm power is turned off and a fatal error message is
displayed.
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+
FREE command at any time. This measures a checksum
+
and servo code is tested every cycle of the V
Adept MV Controller User's Guide, Rev. B
Continuous Tests
+
operating system is
+
code. If