Flip-Flop Types; 10] Rs-Flip-Flop, Superior - BONFIGLIOLI AGILE Applications Manual

4.4

Flip-Flop types

4.4.1

[10] RS-Flip-Flop, Superior

Type
b Set input
I1
I2 b Reset input
I3 b Superior Set input
b Superior Reset input
I4
Description:
The inputs of the instruction are the assigned signal sources.
TRUE at the Set input sets the output to TRUE. TRUE at the Reset input sets the output to
FALSE. If FALSE is present on both inputs, the current status of the output signal is maintained.
TRUE at the Superior Set input sets the output to TRUE. TRUE at the Superior Reset input sets
the output to FALSE.
Priority:
Superior Reset (highest priority)
Superior Set
Reset
Set (lowest priority)
Via the output buffer, the output signal is globally available.
Inputs Superior Set and Superior Reset are connected in series with the function. Levels at Set
input I1 and Reset input I2 are processed internally. As soon as the Superior Set or Superior
Reset is reset, the output is switched to the internally saved value.
Set:
Save:
Reset:
Off:
Superior-Set:
Superior-Reset: SR, set output to FALSE (CLR).
52
52
Function Type
b
O1
O2 b
P1
P2
RS-Flip-Flop, Superior
S
x
X
0
0
1
1
TRUE at the S input sets the output to TRUE.
If all inputs are FALSE, the output remains unchanged.
If R input is TRUE, the output is set to logic FALSE.
If both inputs are set to TRUE, the output is FALSE.
SS, set output to TRUE.
VPLC / PLC
VPLC / PLC
Function
output O1
negated output O2 = O 1
O1
State
R SS SR Q
x X 1 0 Off (Superior)
X 1 0 1 On (Superior)
0 0 0 Q Hold
n-1
1 0 0 0 Reset
0 0 0 1 Set
1 0 0 0 Off
08/10
08/10