BONFIGLIOLI AGILE Applications Manual page 32

Jump function
100 - Jump function
Jump function
101 -
for loops
110 ... 182
Analog functions:
Debouncer
97 - Debouncer
Bit functions for analog input values
Bit NOT opera-
200 -
tion
Bit AND/NAND
201 -
operation
Bit OR/NOR
202 -
operation
Bit XOR/XNOR
203 -
operation
210 - Bit shift right
Bit arithmetical
211 -
shift right
212 - Bit shift left
213 - Bit roll right
220 - Output one bit
Unite four bits
221 -
to form a word
Add two bits to
222 -
a word
Comparators
Comparator (2
301 -
inp.)
Comparator (2
302 - inp.), absolute
value
Comparator
303 - (inp. with
const.)
Comparator
304 - absolute value
inp. with const.
30
30
Branching off to index (table column). See chapter 4.12.1.
A function indicated as jump target in P1 is executed as often as
indicated in P2. Via the inputs , the loop can be stopped or restarted.
See chapter 4.12.2.
Like instruction types 10 ... 82. Evaluation of Master-Set/Master-
Reset instead of Superior-Set/Superior-Reset.
The input value will be forwarded to the output only if it has had a
constant value for the configured delay (P1: pos. edge, P2: neg.
edge).See chapter 4.10.1.
At output 1 O1, the bitwise inverted value of input I1 is output. See
chapter 5.11.1.
The input value at I1 is AND combined. Via P2, you can select:
P2=1: Combination with input value I2
P2=2: Combination with a mask permanently set up in P1,
P2=3: Combination with I2 and P1
See chapter 5.11.3.
The input value at I1 is OR combined. Via P2, you can select:
P2=1: Combination with input value I2
P2=2: Combination with a mask permanently set up in P1,
P2=3: Combination with I2 and P1
See chapter 5.11.2.
The input value at I1 is Exclusive-OR combined. Via P2, you can se-
lect:
P2=1: Combination with input value I2
P2=2: Combination with a mask permanently set up in P1,
P2=3: Combination with I2 and combination of result with P1
See chapter 5.11.4.
The input value at I1 is shifted to the right bitwise by the number of
shifts (P2). Left side is filled with zeroes. See chapter 5.11.5.
The input value at I1 is shifted to the right bitwise by the number of
shifts (P2). The most significant bit (sign bit) is maintained. See
chapter 5.11.6.
The input value at I1 is shifted to the left bitwise by the number of
shifts (P2). Right side is filled with zeroes. See chapter 5.11.7.
The input value at I1 is shifted to the right bitwise by the number of
shifts (P2). On the left side, the bits leaving on the right side will be
inserted. See chapter 5.11.8.
A selected bit of input value 1 is output at output 1. The bit is se-
lected via P1. See chapter 5.11.9.
The state of input 1 is copied to the bit of the output specified via P1,
the state of input 2 to the next bit, etc. See chapter 5.11.10.
The states at inputs I2 and I3 are inserted in certain bits of the input
value 1. The bits are defined by P1 and P2. See chapter 5.11.11.
Input values I1 and I2 are compared. Via P1 and P2, a hysteresis can
be adjusted.
See chapter 5.2.1.
Like operation mode 301, but the absolute values at inputs I1 and I2
are compared. See chapter 5.2.1.
Two switching thresholds are adjusted. If the upper threshold P1 is
exceeded, the output is switched on. If the lower threshold P2 is
deceeded, the output is switched off. See chapter 5.2.2.
Like operation mode 303, but the absolute value at input I1 (varia-
ble) is compared to switching thresholds P1 and P2 (constants). See
chapter 5.2.2.
VPLC / PLC
VPLC / PLC
Digital functions
Analog functions:
Analog functions:
Analog functions
08/10
08/10