Chapter 7 - Autoreclose
5.16
CIRCUIT BREAKER CONTROL
5.16.1
CB CONTROL LOGIC DIAGRAM
CB Control by
Opto
Opto +Local
1
Opto+Remote
Opto+Rem+Local
HMI Trip
Init Trip CB
Init close CB
HMI Close
CB ARIP
Auto Close
Reset Close Dly
Any Trip
Control Trip
External Trip3Ph
External Trip A
External Trip B
External Trip C
CB Open 3 ph
CB Open A ph
CB Open B ph
CB Open C ph
CB Closed 3 ph
CB Closed A ph
1
CB Closed B ph
CB Closed C ph
CB Healthy
CB Man SCOK
V03369
Figure 83: CB Control logic diagram (Module 43)
168
1
&
&
&
1
&
1
1
1
1
&
1
Note: If the DDB signal CB Healthy is not mapped in PSL it defaults to High .
Trip Pulse Time
t
S
Q
0
RD
Man Close Delay
t
S
Q
0
&
RD
1
1
CB Healthy Time
&
Check Sync Time
&
&
Close Pulse Time
t
S
Q
0
RD
&
1
t
0
t
0
P54xMED-TM-EN-1
P54A/B/C/E
Control Trip
CB Trip Fail
Close in Prog
Control Close
CB Close Fail
Man CB Unhealthy
No C/S Man Close