1-Phase Dead Time Logic Diagram; Figure 74: Single-Phase Dead Time Logic Diagram (Module 24) - GE P4A Technical Manual

P54A/B/C/E
5.11.2

1-PHASE DEAD TIME LOGIC DIAGRAM

CB1LSPAR
DTOK CB 1P
Seq Counter = 1
DTOK All
AR Start
DT Start by Prot
Protection Reset
CB1LSPAR
CB1OP2/ 3P
CB1LSPAR
1 Pole Dead Time
CB1LSPAR
V03342

Figure 74: Single-phase Dead Time logic diagram (Module 24)

P54xMED-TM-EN-1
&
&
1
&
Logic 1
&
t
0
S
Q
&
R
1
&
&
Chapter 7 - Autoreclose
OKTimeSP
1P DTime
CB1SPDTCOMP
161