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Outline of system operation
The following describes the processing on the host
side, display/processing on the GOT side, and data
transfer packets.
(Assuming that host side programs use programs
which perform the processing on host side shown
below.)
Processing
Processing on host side
Opens the port.
Writes "1" to the screen
switching device (D20).
Receives a response from
Initial
the GOT.
processing
Judges whether or not there
is an error in the response
from the GOT.
Writes an initial value to
device (D21).
When
Issues the
receiving a
current value
response to
acquisition
writing to
request to
device (D21)
device (D21).
from the GOT
Creates the
next device
value (D21).
When
Calculates
receiving a
the sum
response to
check of the
reading of
send packet.
device (D21)
from the
Issues the
GOT
update
Reception of
request of
response/
device (D21).
interrupt from
When
GOT
receiving an
Sets the state
interrupt
of the base
requesting
screen to
the base
base screen
screen
2.
switching
from 1 to 2
When
receiving an
Sets the state
interrupt
of the base
requesting
screen to
the base
base screen
screen
1.
switching
from 2 to 1
End processing
(only when
Close the port.
receiving an
error response)
Packet used
Display/
for data
Processing on
transfer
GOT side
-
-
Screen 1
batch
Displays base
switching
screen 1.
*1
write packet
-
-
-
-
Batch
Displays "0" on
numerical
the numerical
value display
value display on
*2
base screen 1.
write packet
Batch
numerical
value display
*3
Increments the
read packet
numerical value
displayed on
base screen 1.
-
(The host side
repeats the
processing on
-
the left as long
as base screen
1 is displayed.)
Batch
numerical
value display
*2
write packet
Touch touch
switch 1 to
Interrupt
switch to base
receive
screen 2. Notify
*6
packet
the host by an
interrupt.
Touch touch
switch 3 to
Interrupt
switch to base
receive
screen 1. Notify
*6
packet
the host by an
interrupt.
-
-
61. MICROCOMPUTER CONNECTION (SERIAL)
*1
Displays the send packet structure of the screen 1 batch switching
write packet.
Number of
STX
Command
Address
points
W
D
0
0
2
0
0
02
57
44
30
30
32
30
30
H
H
H
H
H
H
H
H
(H)
(L)
(H)
–
–
(L)
(H)
Sum check is performed in this range.
*2
Displays the send packet structure of the numerical value display
batch write packet.
Number of
STX
Command
Address
points
W
D
0
0
2
1
0
02
57
44
30
30
32
31
30
H
H
H
H
H
H
H
H
(H)
(L)
(H)
–
–
(L)
(H)
Sum check is performed in this range.
*3
Displays the send packet structure of the numerical value display
batch read packet.
Number of
STX
Command
Address
points
R
D
0
0
2
1
0
02
52
44
30
30
32
31
30
H
H
H
H
H
H
H
H
(H)
(L)
(H)
–
–
(L)
(H)
Sum check is performed in this range.
*4
Displays the receive packet structure of the batch write response
packet.
When normally operated
When an error occurred
NAK
ACK
06
15
H
H
*5
Displays the receive packet structure of the batch read response
packet.
When normally operated
STX
Data
ETX
Sum check
(Changes
(any data)
according to
02
03
H
H
data section.)
(H)
–
–
(L)
(H)
(L)
Sum check is performed in this range.
*6
Displays the receive packet structure of the interrupt receive packet.
Output value
Interrupt data
(value of D13)
61.7 System Configuration Examples
Sum
Data 1 (D20)
ETX
Check
1
0
0
0
1
8
2
31
30
30
30
31
03
38
32
H
H
H
H
H
H
H
H
(L)
(H)
–
–
(L)
(H)
(L)
ETX
Sum check
Data 1 (D21)
(Changes
1
(any value)
according to
31
03
data section.)
H
H
(L)
(H)
–
–
(L)
(H)
(L)
Sum
ETX
Check
1
B
D
31
03
42
44
H
H
H
H
(L)
(H)
(L)
When an error occurred
NAK
15
H
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57
58
59
60
61
62
63
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