Figure 240. Txe/Rxne/Bsy Behavior In Master / Full-Duplex Mode (Bidimode=0 And Rxonly=0); Figure 241. Txe/Rxne/Bsy Behavior In Slave / Full-Duplex Mode (Bidimode=0, Rxonly=0) In The - ST STM32F101xx Reference Manual

Serial peripheral interface (SPI)

Figure 240. TXE/RXNE/BSY behavior in Master / full-duplex mode (BIDIMODE=0 and RXONLY=0)

in the case of continuous transfers
Example in Master mode with CPOL=1, CPHA=1
SCK
MISO/MOSI (out)
TXE flag
Tx buffer
(write SPI_DR)
BSY flag
MISO/MOSI (in)
RXNE flag
Rx buffer
(read SPI_DR)
software software waits
writes 0xF1 until TXE=1 and
into SPI_DR writes 0xF2 into
SPI_DR

Figure 241. TXE/RXNE/BSY behavior in Slave / full-duplex mode (BIDIMODE=0, RXONLY=0) in the

case of continuous transfers
Example in Slave mode with CPOL=1, CPHA=1
SCK
MISO/MOSI (out)
TXE flag
Tx buffer
(write to SPI_DR)
BSY flag
MISO/MOSI (in)
RXNE flag
Rx buffer
(read from SPI_DR)
software software waits
writes 0xF1 until TXE=1 and
into SPI_DR writes 0xF2 into
SPI_DR
686/1096
DATA1 = 0xF1
b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7
set by hardware
cleared by software
0xF1 0xF2
set by hardware
DATA1 = 0xA1
b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7
set by hardware
software waits software waits
until RXNE=1 until TXE=1 and
and reads 0xA1 writes 0xF3 into
from SPI_DR SPI_DR
DATA 1 = 0xF1
b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7
set by hardware
cleared by software
0xF1 0xF2
set by cleared by software
DATA 1 = 0xA1
b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7
set by hardware
software waits software waits
until RXNE=1 until TXE=1 and
and reads 0xA1 writes 0xF3 into
from SPI_DR
Doc ID 13902 Rev 12
DATA2 = 0xF2
set by hardware
cleared by software
0xF3
DATA 2 = 0xA2
cleared by software
0xA1
software waits
until RXNE=1
and reads 0xA2
from SPI_ DR
DATA 2 = 0xF2
set by hardware
cleared by software
0xF3
DATA 2 = 0xA2
cleared by software
0xA1
software waits
until RXNE=1
and reads 0xA2
SPI_DR from SPI_ DR
DATA3 = 0xF3
set by hardware
reset by hardware
DATA 3 = 0xA3
0xA2
software waits
until RXNE=1
and reads 0xA3
from SPI_DR
DATA 3 = 0xF3
set by hardware
reset by hardware
DATA 3 = 0xA3
0xA2
software waits
until RXNE=1
and reads 0xA3
from SPI_DR
RM0008
0xA3
ai17343
0xA3
ai17344