Figure 309. Interrupt Hierarchy - ST STM32F101xx Reference Manual

RM0008

Figure 309. Interrupt hierarchy

31 30 29 28 27 26 25 24 23
Core interrupt
register
Interrupt
sources
1. The core interrupt register bits are shown in
page 840.
22 21
20 19 18
(1)
Device all endpoints
interrupt register
OUT endpoints
Device IN/OUT endpoint
interrupt registers 0 to 3
Host port control and status
register
Host all channels interrupt
register
Host channels interrupt
registers 0 to 7
Doc ID 13902 Rev 12
17:10 9 8
16:9 3:0
IN endpoints
OTG_FS core interrupt register (OTG_FS_GINTSTS) on
USB on-the-go full-speed (OTG_FS)
OR
AND
7:3 2 1 0
Core interrupt mask
OTG
interrupt
register
Device all endpoints
interrupt mask register
Device IN/OUT
endpoints common
interrupt mask register
Host all channels
interrupt mask register
Host channels interrupt
mask registers 0 to 7
Interrupt
Global interrupt
mask (Bit 0)
AHB configuration
register
register
ai15616b
825/1096