Figure 316. Normal Isochronous Out/In Transactions - ST STM32F101xx Reference Manual

Advanced arm-based 32-bit mcus
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RM0008

Figure 316. Normal isochronous OUT/IN transactions

init_reg(ch _2)
set_ch_en
read_rx_sts
read_rx_fifo
read_rx_sts
init_reg(ch _2)
set_ch_en
Interrupt service routine for isochronous OUT/IN transactions
Code sample: Isochronous OUT
Unmask (FRMOR/XFRC)
if (XFRC)
{
De-allocate Channel
}
else
if (FRMOR)
{
Unmask CHH
Disable Channel
}
Application
1
init _reg(ch_1)
1
write_tx_fifo
(ch_1)
2
(ch_2)
2
6
init _reg(ch_1)
write_tx_fifo
(ch_1)
6
7
9
(ch_2)
init _reg(ch_1)
write_tx_fifo
(ch_1)
Doc ID 13902 Rev 12
USB on-the-go full-speed (OTG_FS)
AHB
Host
3
1
MPS
ch_1
ch_2
3
5
5
1
MPS
RXFLVL interrupt
1
MPS
RXFLVL interrupt
ch_1
8
ch_2
1
MPS
USB
Device
Periodic Request Queue
Assume that this queue
can hold 4 entries.
4
(micro)
frame
4
(micro)
frame
Odd
Even
ai15676
909/1096

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