Etm (Embedded Trace Macrocell); General Description; Signal Protocol, Packet Types; Main Etm Registers - ST STM32F101xx Reference Manual

RM0008
31.15

ETM (Embedded trace macrocell)

31.15.1

General description

The ETM enables the reconstruction of program execution. Data are traced using the Data
Watchpoint and Trace (DWT) component or the Instruction Trace Macrocell (ITM) whereas
instructions are traced using the Embedded Trace Macrocell (ETM).
The ETM transmits information as packets and is triggered by embedded resources. These
resources must be programmed independently and the trigger source is selected using the
Trigger Event Register (0xE0041008). An event could be a simple event (address match
from an address comparator) or a logic equation between 2 events. The trigger source is
one of the fourth comparators of the DWT module, The following events can be monitored:
●
Clock cycle matching
● Data address matching
For more informations on the trigger resources refer to
watchpoint
The packets transmitted by the ETM are output to the TPIU (Trace Port Interface Unit). The
formatter of the TPIU adds some extra packets (refer to
interface
31.15.2

Signal protocol, packet types

This part is described in the chapter 7 ETMv3 Signal Protocol of the ARM IHI 0014N
document.
31.15.3

Main ETM registers

For more information on registers refer to the chapter 3 of the ARM IHI 0014N specification.

Table 226. Main ETM registers

Address
0xE0041FB0 ETM Lock Access
0xE0041000 ETM Control
0xE0041010 ETM Status
0xE0041008 ETM Trigger Event
0xE004101C ETM Trace Enable Control This register defines which comparator is selected.
0xE0041020 ETM Trace Enable Event
0xE0041024 ETM Trace Start/Stop
trigger).
unit)) and then outputs the complete packet sequence to the debugger host.
Register
Doc ID 13902 Rev 12
Section 31.13: DWT (data
Section 31.17: TPIU (trace port
Write 0xC5ACCE55 to unlock the write access to the
other ETM registers.
This register controls the general operation of the ETM,
for instance how tracing is enabled.
This register provides information about the current status
of the trace and trigger logic.
This register defines the event that will control trigger.
This register defines the trace enabling event.
This register defines the traces used by the trigger source
to start and stop the trace, respectively.
Debug support (DBG)
Details
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