Id Codes And Locking Mechanism; Mcu Device Id Code; Figure 361. Jtag Tap Connections - ST STM32F101xx Reference Manual

Advanced arm-based 32-bit mcus
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RM0008

Figure 361. JTAG TAP connections

31.6

ID codes and locking mechanism

There are several ID codes inside the STM32F10xxx MCUs. ST strongly recommends tools
designers to lock their debuggers using the MCU DEVICE ID code located in the external
PPB memory map at address 0xE0042000.
31.6.1

MCU device ID code

The STM32F10xxx MCUs integrate an MCU ID code. This ID identifies the ST MCU part-
number and the die revision. It is part of the DBG_MCU component and is mapped on the
external PPB bus (see
JTAG debug port (4 to 5 pins) or the SW debug port (two pins) or by the user software. It is
even accessible while the MCU is under system reset.
DBGMCU_IDCODE
Address: 0xE0042000
Only 32-bits access supported. Read-only.
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30
29
28
r
r
r
15
14
13
12
Reserved
STM32F10xxx
NJTRST
JTMS
SW-DP
Selected
JTDI
JTDO
Section 31.16 on page
27
26
25
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r
r
r
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10
9
r
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Doc ID 13902 Rev 12
TMS nTRST
TDI
TDO
TDI
Boundary scan
TAP
IR is 5-bit wide
1068). This code is accessible using the
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21
REV_ID
r
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r
8
7
6
DEV_ID
r
r
r
Debug support (DBG)
TMS nTRST
TDO
Cortex-M3 TAP
IR is 4-bit wide
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5
4
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2
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ai14981b
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