Download Print this page
ST ST7735R Manual

ST ST7735R Manual

262k color single-chip tft controller/driver

Advertisement

Quick Links

1
Introduction
The ST7735R is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 396 source line and 162
gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts Serial
Peripheral Interface (SPI), 8-bit/9-bit/16-bit/18-bit parallel interface. Display data can be stored in the on-chip display data
RAM of 132 x 162 x 18 bits. It can perform display data RAM read/write operation with no external operation clock to
minimize power consumption. In addition, because of the integrated power supply circuits necessary to drive liquid crystal,
it is possible to make a display system with fewer components.
2
Features
Single chip TFT-LCD Controller/Driver with RAM
On-chip Display Data RAM (i.e. Frame Memory)
132 (H) x RGB x 162 (V) bits
LCD Driver Output Circuits:
Source Outputs: 132 RGB channels
Gate Outputs: 162 channels
Common electrode output
Display Colors (Color Mode)
Full Color: 262K, RGB=(666) max., Idle Mode OFF
Color Reduce: 8-color, RGB=(111), Idle Mode ON
Programmable Pixel Color Format (Color Depth) for
Various Display Data input Format
12-bit/pixel: RGB=(444) using the 384k-bit frame memory
and LUT
16-bit/pixel: RGB=(565) using the 384k-bit frame memory
and LUT
18-bit/pixel: RGB=(666) using the 384k-bit frame memory
and LUT
Various Interfaces
Parallel 8080-series MCU Interface
(8-bit, 9-bit, 16-bit & 18-bit)
Parallel 6800-series MCU Interface
(8-bit, 9-bit, 16-bit & 18-bit)
3-line serial interface
4-line serial interface
Display Features
Support both normal-black & normal-white LC
Software programmable color depth mode
Parallel Interface: 8080,6800(8-bit/9-bit/16-bit/18-bit)
ST7735R
Serial Interface: 3-line, 4-line
Sitronix Technology Corp. reserves the right to change the contents in this document without prior notice.
V0.2
262K Color Single-Chip TFT Controller/Driver
Built-in Circuits
DC/DC converter
Adjustable VCOM generation
Non-volatile (NV) memory to store initial register setting
Oscillator for display clock generation
Factory default value (module ID, module version, etc) are
stored in NV memory
Timing controller
Built-in NV Memory for LCD Initial Register Setting
7-bits for ID2
8-bits for ID3
7-bits for VCOM adjustment
Wide Supply Voltage Range
I/O Voltage (VDDI to DGND): 1.65V~3.7V (VDDI ≤ VDD)
Analog Voltage (VDD to AGND): 2.3V~4.8V
On-Chip Power System
Source Voltage (GVDD to AGND): 3.0V~4.5V
VCOM level (VCOM to AGND): -0.4V to -2.0V
Gate driver HIGH level (VGH to AGND): +10.0V to +15V
Gate driver LOW level (VGL to AGND): -13V to -7.5V
Operating Temperature: -30° C to +85° C
1
ST
ST7735R
2009-8-5

Advertisement

loading
Need help?

Need help?

Do you have a question about the ST7735R and is the answer not in the manual?

Questions and answers

Summary of Contents for ST ST7735R

  • Page 1 262K Color Single-Chip TFT Controller/Driver Introduction The ST7735R is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 396 source line and 162 gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts Serial Peripheral Interface (SPI), 8-bit/9-bit/16-bit/18-bit parallel interface.
  • Page 2 ST7735R Pad arrangement 3.1 Output Bump Dimension Boundary (Include scribe Lane) Item Symbol Size Bump pitch 16 um Bump width 16 um Bump height 98 um Bump gap1 (Vertical) 19 um Bump gap2 (Horizontal) 16 um Bump area C x H...
  • Page 3 ST7735R 3.2 Input Bump Dimension Boundary (Include scribe Lane) Item Symbol Size Bump pitch 1 67 um Bump pitch 2 50 um Bump width 1 33 um Bump width 2 38 um Bump height 88 um Bump gap 22 um...
  • Page 4 ST7735R 3.3 Alignment Mark Dimension 10 5 V0.2 2009-08-05...
  • Page 5 ST7735R 3.4 Chip Information Chip size (um x um): 10080 x 670 PAD coordinate: pad center Coordinate origin: chip center Chip thickness (um): 300(TYP) Bump height (um): 15(TYP) Bump hardness (HV): 75(TYP) No.186 No.185 No.759 No.1 V0.2 2009-08-05...
  • Page 6 ST7735R Pad Center Coordinates PAD Name PAD Name PAD Name Dummy DGND -4750 -231 -2250 -231 -231 VDDIO DGND -4700 -231 -2200 -231 -231 EXTC VDDI -4650 -231 -2150 -231 -231 DGNDO VDDI -4600 -231 -2100 -231 -231 IM[0] VDDI...
  • Page 7 ST7735R PAD Name PAD Name PAD Name AVCL G136 3050 -231 4532 3732 Dummy G134 3100 -231 4516 3716 Dummy G132 3150 -231 4500 3700 Dummy G130 3200 -231 4484 3684 Dummy G128 3250 -231 4468 3668 Dummy G126 3300...
  • Page 8 ST7735R PAD Name PAD Name PAD Name S368 S318 S268 2932 2132 1332 S367 S317 S267 2916 2116 1316 S366 S316 S266 2900 2100 1300 S365 S315 S265 2884 2084 1284 S364 S314 S264 2868 2068 1268 S363 S313 S263...
  • Page 9 ST7735R PAD Name PAD Name PAD Name S218 S172 S122 -644 -1444 S217 S171 S121 -660 -1460 S216 S170 S120 -676 -1476 S215 S169 S119 -692 -1492 S214 S168 S118 -708 -1508 S213 S167 S117 -724 -1524 S212 S166 S116...
  • Page 10 ST7735R PAD Name PAD Name PAD Name -2244 -3044 -3844 -2260 -3060 -3860 -2276 -3076 -3876 -2292 -3092 -3892 -2308 -3108 -3908 -2324 -3124 -3924 -2340 -3140 -3940 -2356 -3156 -3956 -2372 -3172 -3972 -2388 -3188 -3988 -2404 -3204 -4004...
  • Page 11 ST7735R PAD Name G149 -4644 G151 -4660 G153 -4676 G155 -4692 G157 -4708 G159 -4724 G161 -4740 Dummy -4756 Dummy -4772 ALIGNMENT_R 4841 -220 ALIGNMENT_L -4841 -220 V0.2 2009-08-05...
  • Page 12 ST7735R Block diagram 162 Gate Buffer Voltage 396 Source Buffer Reference Level Shifter Gamma Circuit Gate Decoder Level Shifter Data Latch Gamma Table Vcom generator VCOM Display Ram Display control 132 x 162 x 18 bits Color conversion Instruction LUT table...
  • Page 13 ST7735R Driver IC Pin Description 6.1 Power Supply Pin Name Description Connect pin Power supply for analog, digital system and booster circuit. VDDI Power supply for I/O system. VDDI AGND System ground for analog system and booster circuit. DGND System ground for I/O system and digital system.
  • Page 14 ST7735R -Write enable in MCU parallel interface. -In 4-line SPI, this pin is used as D/CX (data/ command selection). (D/CX) -If not used, please fix this pin at VDDI or DGND level. -D[17:0] are used as MCU parallel interface data bus.
  • Page 15 ST7735R 6.3 Mode selection pin Name Description Connect pin -During normal operation, please open this pin. EXTC Enable/disable modification of extend command EXTC Open Normal operation mode Use NVM command set -Panel resolution selection pins. Selection of panel resolution GM1, VDDI/DGND 132RGB x 162 (S1~S396 &...
  • Page 16 ST7735R When writing NVM, it needs external power supply voltage (7.5V). Input pin to select horizontal line number in TE signal. This pin is only for GM[1:0]=’00’ mode TESEL Selection of gamma curve TESEL VDDI/DGND TE output 162 lines TE output 160 lines 6.4 Driver output pins...
  • Page 17 ST7735R 6.5 Test pins Name Description Connect pin TEST2P -These test pins for Driver vender test used. DGND -Please connect these pins to DGND. TEST1P TESTOP[8] TESTOP[7] TESTOP[6] TESTOP[5] -These test pins for Driver vender test used. Open -Please open these pins.
  • Page 18 ST7735R Driver electrical characteristics 7.1 Absolute operation range Item Symbol Rating Unit Supply voltage - 0.3 ~ +4.6 Supply voltage (Logic) VDDI - 0.3 ~ +4.6 Supply voltage (Digital) -0.3 ~ +1.95 Driver supply voltage VGH-VGL -0.3 ~ +30.0 Logic input voltage range 0.3 ~ VDDI + 0.3...
  • Page 19 ST7735R 7.2 DC characteristic Symbo Specification Related Parameter Condition Pins Power & operation voltage System voltage Operating voltage 2.75 Interface operation VDDI I/O supply voltage 1.65 voltage Gate driver high voltage Gate driver low voltage -12.4 -7.5 Gate driver supply voltage | VGH-VGL | 17.5...
  • Page 20 Partial + Idle mode (40 lines) Note 2 Sleep-in mode Notes: 1. All pixels black. 2. All pixels white. 3. The Current Consumption is DC characteristics of ST7735R. 4. Typical: VDDI=1.8V, VDD=2.75V; Maximum: VDDI=1.65 to 3.7V, VDD=2.3 to 4.8V V0.2 2009-08-05...
  • Page 21 ST7735R Timing chart 8.1 Parallel interface characteristics: 18, 16, 9 or 8-bit bus (8080 series MCU interface) Figure 8.1.1 Parallel interface timing characteristics (8080 series MCU interface) Ta=25 ℃, VDDI=1.65~3.7V, VDD=2.3~4.8V Signal Symbol Parameter Unit Description TAST Address setup time...
  • Page 22 ST7735R Figure 8.1.2 Rising and falling timing for input and output signal Figure 8.1.3 Chip selection (CSX) timing Figure 8.1.4 Write-to-read and read-to-write timing Note: The rising time and falling time (Tr, Tf) of input signal are specified at 15 ns or less. Logic high and low levels are specified as 30% and 70% of VDDI for Input signals.
  • Page 23 ST7735R 8.2 Parallel interface characteristics: 18, 16, 9 or 8-bit bus (6800 series MCU interface) Figure 8.2.1Parallel interface timing characteristics (6800-series MCU interface) Ta=25 ℃, VDDI=1.65~3.7V, VDD=2.3~4.8V Signal Symbol Parameter Unit Description Address setup time D/CX Address hold time (Write/Read) Chip select “H”...
  • Page 24 ST7735R 8.3 Serial interface characteristics (3-line serial) SCYCW SCYCR (DOUT) Figure 8.3.1 3-line serial interface timing Ta=25 ℃, VDDI=1.65~3.7V, VDD=2.3~4.8V Signal Symbol Parameter Unit Description TCSS Chip select setup time (write) TCSH Chip select hold time (write) TCSS Chip select setup time (read)
  • Page 25 ST7735R 8.4 Serial interface characteristics (4-line serial) Figure 8.4.1 4-line serial interface timing Ta=25 ℃, VDDI=1.65~3.7V, VDD=2.3~4.8V Signal Symbol Parameter Unit Description TCSS Chip select setup time (write) TCSH Chip select hold time (write) TCSS Chip select setup time (read)
  • Page 26 ST7735R Function description 9.1 Interface type selection The selection of given interfaces are done by setting IM2, IM1, and IM0 pins as shown in following table. Interface Read back selection 3-line serial interface Via the read instruction 8080 MCU 8-bit parallel...
  • Page 27 ST7735R 9.2 8080-series MCU parallel interface (P68 = ‘0’) The MCU can use one of following interfaces: 11-lines with 8-data parallel interface, 12-lines with 9-data parallel interface, 19-line with 16-data parallel interface or 21-lines with 18-data parallel interface. The chip-select CSX (active low) enables/disables the parallel interface.
  • Page 28 ST7735R 9.2.1 Write cycle sequence The write cycle means that the host writes information (command or/and data) to the display via the interface. Each write cycle (WRX high-low-high sequence) consists of 3 control signals (D/CX, RDX, WRX) and data signals (D[17:0]). D/CX bit is a control signal, which tells if the data is a command or a data.
  • Page 29 ST7735R 9.2.2 Read cycle sequence The read cycle (RDX high-low-high sequence) means that the host reads information from LCD driver via interface. The driver sends data (D[17:0]) to the host when there is a falling edge of RDX and the host reads data when there is a rising edge of RDX.
  • Page 30 ST7735R 9.3 6800-series MCU parallel interface (P68 = ‘1’) The MCU uses one of following interface: 11-lines with 8-data parallel interface, 12-lines with 9-data parallel interface, 19-lines with 16-data parallel interface, or 21-lines with 18-data parallel interface. The chip-select CSX(active low) enables and disables the parallel interface.
  • Page 31 ST7735R Figure 9.3.2 6800-series parallel bus protocol, write to register or display RAM V0.2 2009-08-05...
  • Page 32 ST7735R 9.3.2 9.3.2 Read cycle sequence The read cycle (E low-high-low sequence) means that the host reads information from LCD driver via interface. The driver sends data (D[17:0]) to the host when there is a rising edge of E and the host reads data when there is a falling edge of E.
  • Page 33 ST7735R 9.4 Serial interface The selection of this interface is done by IM2. See the Table 9.4.1. 4WSPI Interface Read back selection 3-line serial interface Via the read instruction (8-bit, 24-bit and 32-bit read parameter) 4-line serial interface Via the read instruction (8-bit, 24-bit and 32-bit read parameter) Table 9.4.2 Selection of serial interface...
  • Page 34 ST7735R Figure 9.4.3 3-line serial interface write protocol (write to register with control bit in transmission) Figure 9.4.4 4-line serial interface write protocol (write to register with control bit in transmission) 9.4.2 Read Functions The read mode of the interface means that the micro controller reads register value from the driver. To achieve read function, the micro controller first has to send a command (read ID or register command) and then the following byte is transmitted in the opposite direction.
  • Page 35 ST7735R 9.4.3 3-line serial protocol 3-line serial protocol (for RDID1/RDID2/RDID3/0Ah/0Bh/0Ch/0Dh/0Eh/0Fh command: 8-bit read): 3-line serial protocol (for RDDID command: 24-bit read) 3-line Serial Protocol (for RDDST command: 32-bit read) Figure 9.4.5 3-line serial interface read protocol V0.2 2009-08-05...
  • Page 36 ST7735R 9.4.4 4-line serial protocol 4-line serial protocol (for RDID1/RDID2/RDID3/0Ah/0Bh/0Ch/0Dh/0Eh/0Fh command: 8-bit read): 4-line serial protocol (for RDDID command: 24-bit read) 4-line Serial Protocol (for RDDST command: 32-bit read) Figure 9.4.6 4-line serial interface read protocol V0.2 2009-08-05...
  • Page 37 ST7735R 9.5 Data Transfer Break and Recovery If there is a break in data transmission by RESX pulse, while transferring a command or frame memory data or multiple parameter command data, before Bit D0 of the byte has been completed, then driver will reject the previous bits and have reset the interface such that it will be ready to receive command data again when the chip select line (CSX) is next activated after RESX have been HIGH state.
  • Page 38 ST7735R Figure 9.5.3 Write interrupts recovery (serial interface) If a 2 or more parameter commands are being sent and a break occurs by the other command before the last one is sent, then the parameters that were successfully sent are stored and the other parameter of that command remains previous value.
  • Page 39 ST7735R 9.6 Data transfer pause It will be possible when transferring a command, frame memory data or multiple parameter data to invoke a pause in the data transmission. If the chip select line is released after a whole byte of a frame memory data or multiple parameter data has been completed, then driver will wait and continue the frame memory data or parameter data transmission from the point where it was paused.
  • Page 40 ST7735R 9.7 Data Transfer Modes The module has three kinds color modes for transferring data to the display RAM. These are 12-bit color per pixel, 16-bit color per pixel and 18-bit color per pixel. The data format is described for each interface. Data can be downloaded to the frame memory by 2 methods.
  • Page 41 ST7735R 9.8 Data Color Coding 9.8.1 8-bit Parallel Interface (IM2, IM1, IM0= “100”) Different display data formats are available for three Colors depth supported by listed below. - 4k colors, RGB 4,4,4-bit input. - 65k colors, RGB 5,6,5-bit input. - 262k colors, RGB 6,6,6-bit input.
  • Page 42 ST7735R 9.8.3 8-bit data bus for 16-bit/pixel (RGB 5-6-5-bit input), 65K-Colors, 3AH= “05h” There is 1 pixel (3 sub-pixels) per 2-byte “ “ “ “ 1” ” ” ” RESX “ “ “ “ 100” ” ” ” IM[2:0] D/CX “...
  • Page 43 ST7735R 9.8.4 8-bit data bus for 18-bit/pixel (RGB 6-6-6-bit input), 262K-Colors, 3AH= “06h” There is 1 pixel (3 sub-pixels) per 3-bytes. “ “ “ “ 1” ” ” ” RESX “ “ “ “ 100” ” ” ” IM[2:0] D/CX “...
  • Page 44 ST7735R 9.8.5 16-Bit Parallel Interface (IM2,IM1, IM0= “101”) Different display data formats are available for three colors depth supported by listed below. - 4k colors, RGB 4,4,4-bit input - 65k colors, RGB 5,6,5-bit input - 262k colors, RGB 6,6,6-bit input 9.8.6...
  • Page 45 ST7735R 9.8.7 16-bit data bus for 16-bit/pixel (RGB 5-6-5-bit input), 65K-Colors, 3AH= “05h” There is 1 pixel (3 sub-pixels) per 1 byte “ “ “ “ 1” ” ” ” RESX “ “ “ “ 101” ” ” ” IM[2:0] D/CX “...
  • Page 46 ST7735R 9.8.8 16-bit data bus for 18-bit/pixel (RGB 6-6-6-bit input), 262K-Colors, 3AH= “06h” There are 2 pixels (6 sub-pixels) per 3 bytes “ “ “ “ 1” ” ” ” RESX “ “ “ “ 101” ” ” ” IM[2:0] D/CX “...
  • Page 47 ST7735R 9.8.9 9-Bit Parallel Interface (IM2, IM1, IM0=“110”) Different display data formats are available for three colors depth supported by listed below. -262k colors, RGB 6,6,6-bit input 9.8.10 Write 9-bit data for RGB 6-6-6-bit input (262k-color) There is 1 pixel (6 sub-pixels) per 3 bytes “...
  • Page 48 ST7735R 9.8.11 18-Bit Parallel Interface (IM2, IM1, IM0=“111”) Different display data formats are available for three colors depth supported by listed below. - 4k colors, RGB 4,4,4-bit input - 65k colors, RGB 5,6,5-bit input - 262k colors, RGB 6,6,6-bit input.
  • Page 49 ST7735R 9.8.13 18-bit data bus for 16-bit/pixel (RGB 5-6-5-bit input), 65K-Colors, 3AH=“05h” There is 1 pixel (3 sub-pixels) per 1 byte “ “ “ “ 1” ” ” ” RESX “ “ “ “ 111” ” ” ” IM[2:0] D/CX “...
  • Page 50 ST7735R 9.8.14 18-bit data bus for 18-bit/pixel (RGB 6-6-6-bit input), 262K-Colors, 3AH=“06h” There is 1 pixel (3 sub-pixels) per 1 byte “ “ “ “ 1” ” ” ” RESX “ “ “ “ 111” ” ” ” IM[2:0] D/CX “...
  • Page 51 ST7735R 9.8.15 3-line serial Interface Different display data formats are available for three colors depth supported by the LCM listed below. 4k colors, RGB 4-4-4-bit input 65k colors, RGB 5-6-5-bit input 262k colors, RGB 6-6-6-bit input 9.8.16 Write data for 12-bit/pixel (RGB 4-4-4-bit input), 4K-Colors, 3AH=“03h”...
  • Page 52 ST7735R 9.8.17 Write data for 16-bit/pixel (RGB 5-6-5-bit input), 65K-Colors, 3AH=“05h” Note 1: Pixel data with the 16-bit color depth information Note 2: The most significant bits are: Rx4, Gx5 and Bx4 Note 3: The least significant bits are: Rx0, Gx0 and Bx0 V0.2...
  • Page 53 ST7735R 9.8.18 Write data for 18-bit/pixel (RGB 6-6-6-bit input), 262K-Colors, 3AH=“06h” Note 1: Pixel data with the 18-bit color depth information Note 2: The most significant bits are: Rx5, Gx5 and Bx5 Note 3: The least significant bits are: Rx0, Gx0 and Bx0 V0.2...
  • Page 54 ST7735R 9.8.19 4-line serial Interface Different display data formats are available for three colors depth supported by the LCM listed below. 4k colors, RGB 4-4-4-bit input 65k colors, RGB 5-6-5-bit input 262k colors, RGB 6-6-6-bit input 9.8.20 Write data for 12-bit/pixel (RGB 4-4-4-bit input), 4K-Colors, 3AH=“03h”...
  • Page 55 ST7735R 9.8.21 Write data for 16-bit/pixel (RGB 5-6-5-bit input), 65K-Colors, 3AH=“05h” Note 1. pixel data with the 16-bit color depth information Note 2. The most significant bits are: Rx4, Gx5 and Bx4 Note 3. The least significant bits are: Rx0, Gx0 and Bx0 9.8.22 Write data for 18-bit/pixel (RGB 6-6-6-bit input), 262K-Colors, 3AH=“06h”...
  • Page 56 ST7735R 9.9 Display Data RAM 9.9.1 Configuration (GM[1:0] = “00”) The display module has an integrated 132x162x18-bit graphic type static RAM. This 384,912-bit memory allows storing on-chip a 132xRGBx162 image with an 18-bpp resolution (262K-color). There will be no abnormal visible effect on the display when there is a simultaneous Panel Read and Interface Read or Write to the same location of the Frame Memory.
  • Page 57 ST7735R 9.9.2 Memory to Display Address Mapping 9.9.3 When using 128RGB x 160 resolution (GM[1:0] = “11”, SMX=SMY=SRGB= ‘0’) Pixel 1 Pixel 2 Pixel 127 Pixel 128 -------- Source Out Gate Out S12 -------- S385 S386 S387 S388 S389 S390...
  • Page 58 ST7735R 9.9.4 When using 132RGB x 162 resolution (GM[1:0] = “00”, SMX=SMY=SRGB= ‘0’) Pixel 1 Pixel 2 Pixel 131 Pixel 132 -------- Source Out Gate Out -------- S391 S392 S393 S394 S395 S396 Order MY=' 0 ' MY=' 1 '...
  • Page 59 ST7735R 9.9.5 Normal Display On or Partial Mode On 9.9.6 When using 128RGB x 160 resolution (GM[1:0] = “11”) In this mode, the content of the frame memory within an area where column pointer is 00h to 7Fh and page pointer is 00h to 9Fh is displayed.
  • Page 60 ST7735R 9.9.7 When using 132RGB x 162 resolution (GM[1:0] = “00”) In this mode, contents of the frame memory within an area where column pointer is 00h to 83h and page pointer is 00h to A1h is displayed. To display a dot on leftmost top corner, store the dot data at (column pointer, row pointer) = (0, 0) 1).
  • Page 61 ST7735R 9.10 Address Counter The address counter sets the addresses of the display data RAM for writing and reading. Data is written pixel-wise into the RAM matrix of DRIVER. The data for one pixel or two pixels is collected (RGB 6-6-6-bit), according to the data formats.
  • Page 62 ST7735R 9.11 Memory Data Write/ Read Direction The data is written in the order illustrated above. The Counter which dictates where in the physical memory the data is to be written is controlled by “Memory Data Access Control” Command, bits B5 (MV), B6 (MX), B7 (MY) as described below.
  • Page 63 ST7735R 9.11.3 Frame Data Write Direction According to the MADCTL parameters (MV, MX and MY) MADCTL Display Data Image in the Host Image in the Driver Parameter Direction (MPU) (DDRAM) Normal Y-Mirror X-Mirror X-Mirror Y-Mirror X-Y Exchange X-Y Exchange Y-Mirror...
  • Page 64 ST7735R 9.12 Tearing Effect Output Line The Tearing Effect output line supplies to the MPU a Panel synchronization signal. This signal can be enabled or disabled by the Tearing Effect Line Off & On commands. The mode of the Tearing Effect signal is defined by the parameter of the Tearing Effect Line On command.
  • Page 65 ST7735R 9.12.2 Tearing Effect Line Timings The Tearing Effect signal is described below: Symbol Parameter unit description tvdl Vertical Timing Low Duration tvdh Vertical Timing High Duration 1000 µs µs thdl Horizontal Timing Low Duration thdh Horizontal Timing Low Duration µs...
  • Page 66 ST7735R 9.12.3 Example 1: MPU Write is faster than panel read Data write to Frame Memory is now synchronized to the Panel Scan. It should be written during the vertical sync pulse of the Tearing Effect Output Line. This ensures that data is always written ahead of the panel scan and each Panel Frame refresh has a complete new image: V0.2...
  • Page 67 ST7735R 9.12.4 Example 2: MPU write is slower than panel read The MPU to Frame Memory write begins just after Panel Read has commenced i.e. after one horizontal sync pulse of the Tearing Effect Output Line. This allows time for the image to download behind the Panel Read pointer and finishing download during the subsequent Frame before the Read Pointer “catches”...
  • Page 68 ST7735R 9.13 Power ON/OFF Sequence VDD must be powered on before the VDDI. VDDI must be powered off before the VDD. During power off, if LCD is in the Sleep Out mode, VDD and VDDI must be powered down minimum 120msec after RESX has been released.
  • Page 69 ST7735R 9.14 Power Level Definition 9.14.1 Power Level 6 level modes are defined they are in order of Maximum Power consumption to Minimum Power Consumption 1. Normal Mode On (full display), Idle Mode Off, Sleep Out. In this mode, the display is able to show maximum 262,144 colors.
  • Page 70 ST7735R 9.14.2 Power Flow Chart Normal display mode on = NOR ON Power on sequence Partial display mode on = PTL ON HW reset Idle mode off = IDM OFF SW reset Idle mode on = IDM ON Sleep out = SLP OUT...
  • Page 71 ST7735R 9.15 Reset Table 9.15.1 Reset Table (Default Value, GM[1:0]=“11”, 128RGB x 160) Item After Power On After H/W Reset After S/W Reset Frame memory Random No Change No Change Sleep In/Out Display On/Off Display mode (normal/partial) Normal Normal Normal...
  • Page 72 ST7735R 9.15.2 Reset Table (GM[1:0]= “00”, 132RGB x 162) Item After Power On After H/W Reset After S/W Reset Frame memory Random No Change No Change Sleep In/Out Display On/Off Display mode (normal/partial) Normal Normal Normal Display Inversion On/Off Display Idle Mode On/Off...
  • Page 73 ST7735R 9.16 Module Input/Output Pins 9.16.1 Output or Bi-directional (I/O) Pins Output or Bi-directional pins After Power On After Hardware Reset After Software Reset D7 to D0 (Output driver) High-Z (Inactive) High-Z (Inactive) High-Z (Inactive) During Power After Hardware After Software...
  • Page 74 ST7735R 9.17 Reset Timing Related Pins Symbol Parameter Unit tRESW Reset pulse duration RESX tREST Reset cancel Table 9.17.1 Reset timing Notes: 1. The reset cancel includes also required time for loading ID bytes, VCOM setting and other settings from NVM (or similar device) to registers.
  • Page 75 ST7735R 9.18 Color Depth Conversion Look Up Tables 9.18.1 65536 Color to 262,144 Color Look Up Table Output RGBSET Look Up Table Input Data Color Frame Memory Data (6-bits) Parameter 65k Color (5-bits) R005 R004 R003 R002 R001 R000 00000...
  • Page 76 ST7735R G215 G214 G213 G212 G211 G210 010101 G225 G224 G223 G222 G221 G220 010110 G235 G234 G233 G232 G231 G230 010111 G245 G244 G243 G242 G241 G240 011000 G255 G254 G253 G252 G251 G250 011001 G265 G264 G263 G262 G261 G260...
  • Page 77 ST7735R B175 B174 B173 B172 B171 B170 10001 B185 B184 B183 B182 B181 B180 10010 B195 B194 B193 B192 B191 B190 10011 B205 B204 B203 B202 B201 B200 10100 B215 B214 B213 B212 B211 B210 10101 B225 B224 B223 B222 B221 B220...
  • Page 78 ST7735R 9.18.2 4096 Color to 262,144 Color Look Up Table Output RGBSET Look Up Table Input Data Color Frame Memory Data (6-bits) Parameter 4k Color (4-bits) R005 R004 R003 R002 R001 R000 0000 R015 R014 R013 R012 R011 R010 0001...
  • Page 79 ST7735R 10 Command 10.1 System function Command List and Description Table 10.1.1 System Function command List (1) Instruction Refer D/CX WRX RDX D17-8 Function 10.1.1 0 ↑ (00h) No Operation SWRESET 10.1.2 0 ↑ (01h) Software reset ↑ (04h) Read Display ID ↑...
  • Page 80 ST7735R Table 10.1.2 System Function command List (2) Instructio Refer WR RDX D17- Function 10.1.10 SLPIN ↑ (10h) Sleep in & booster off SLPOUT 10.1.11 ↑ (11h) Sleep out & booster on PTLON 10.1.12 ↑ (12h) Partial mode on NORON 10.1.13...
  • Page 81 ST7735R Table 10.1.3 System Function command List (3) Instruction Refer D/CXWRXRDXD17-8 D7 Function ↑ (30h) Partial start/end address set ↑ PSL15 PSL14 PSL13PSL12 PSL11 PSL10 PSL9 PSL8 Partial start address (0,1,2, ..P) PTLAR 10.1.24 ↑ PSL7 PSL6 PSL5 PSL4 PSL3 PSL2 PSL1 PSL0 ↑...
  • Page 82 ST7735R 10.1.1 NOP (00h) NOP (No Operation) Inst / Para D/CX D17-8 ↑ (00h) No Parameter Parameter This command is empty command. Description “-“ Don’t care V0.2 2009-08-05...
  • Page 83 ST7735R 10.1.2 SWRESET (01h): Software Reset SWRESET (Software Reset) Inst / Para D/CX D17-8 SWRESET ↑ (01h) No Parameter Parameter “-“ Don’t care -If Software Reset is applied during Sleep In mode, it will be necessary to wait 120msec before sending next command.
  • Page 84 ST7735R 10.1.3 RDDID (04h): Read Display ID RDDID (Read Display ID) Inst / Para D/CX D17-8 RDDID ↑ (04h) parameter ↑ parameter ↑ ID17 ID16 ID15 ID14 ID13 ID12 ID11 ID10 parameter ↑ ID26 ID25 ID24 ID23 ID22 ID21 ID20 parameter ↑...
  • Page 85 ST7735R 10.1.4 RDDST (09h): Read Display Status RDDST (Read Display Status) Inst / Para D/CX D17-8 RDDST ↑ (09h) parameter ↑ parameter ↑ BSTON ST24 parameter ↑ ST23 IFPF2 IFPF1 IFPF0 IDMON PTLON SLOUT NORON parameter ↑ ST15 ST14 INVON...
  • Page 86 ST7735R DISON Display On/Off ‘1’ = On, “0” = Off TEON Tearing effect line on/off ‘1’ = On, “0” = Off GCSEL2 “000” = GC0 “001” = GC1 GCSEL1 Gamma Curve Selection “010” = GC2 “011” = GC3 GCSEL0 ”100” to “111” = Not defined Tearing effect line mode ‘0’...
  • Page 87 ST7735R 10.1.5 RDDPM (0Ah): Read Display Power Mode RDDPM (Read Display Power Mode) Inst / Para D/CX D17-8 RDDPM ↑ (0Ah) parameter ↑ parameter ↑ BSTON IDMON PTLON SLPOUT NORON DISON This command indicates the current status of the display as described in the table below: “-“...
  • Page 88 ST7735R 10.1.6 RDDMADCTL (0Bh): Read Display MADCTL RDDMADCTL (Read Display MADCTL) Inst / Para D/CX D17-8 RDDMADCTL ↑ (0Bh) parameter ↑ parameter ↑ This command indicates the current status of the display as described in the table below: “-“ Don’t care...
  • Page 89 ST7735R 10.1.7 RDDCOLMOD (0Ch): Read Display Pixel Format RDDCOLMOD (Read Display Pixel Format) Inst / Para D/CX D17-8 RDDCOLMOD ↑ (0Ch) parameter ↑ parameter ↑ IFPF2 IFPF1 IFPF0 This command indicates the current status of the display as described in the table below:...
  • Page 90 ST7735R 10.1.8 RDDIM (0Dh): Read Display Image Mode RDDIM (0Dh): Read Display Image Mode Inst / Para D/CX D17-8 RDDIM ↑ (0Dh) parameter ↑ parameter ↑ VSSON INVON GCS2 GCS1 GCS0 This command indicates the current status of the display as described in the table below: “-“...
  • Page 91 ST7735R 10.1.9 RDDSM (0Eh): Read Display Signal Mode RDDSM (0Eh): Read Display Signal Mode Inst / Para D/CX D17-8 RDDSM ↑ (0Eh) parameter ↑ parameter ↑ TEON This command indicates the current status of the display as described in the table below: “-“...
  • Page 92 ST7735R Flow Chart V0.2 2009-08-05...
  • Page 93 ST7735R 10.1.10 SLPIN (10h): Sleep In SLPIN (Sleep In) Inst / Para D/CX D17-8 SLPIN ↑ (10h) Parameter No Parameter -This command causes the LCD module to enter the minimum power consumption mode. Description -In this mode the DC/DC converter is stopped, Internal display oscillator is stopped, and panel scanning is stopped.
  • Page 94 ST7735R 10.1.11 SLPOUT (11h): Sleep Out SLPOUT (Sleep Out) Inst / Para D/CX D17-8 SLPOUT ↑ (11h) Parameter No Parameter -This command turns off sleep mode. Description -In this mode the DC/DC converter is enabled, Internal display oscillator is started, and panel scanning is started.
  • Page 95 ST7735R 10.1.12 PTLON (12h): Partial Display Mode On PTLON (12h): Partial Display Mode On Inst / Para D/CX D17-8 PTLON ↑ (12h) Parameter No Parameter -This command turns on Partial mode. The partial mode window is described by the Partial Area command (30h) -To leave Partial mode, the Normal Display Mode On command (13h) should be written.
  • Page 96 ST7735R 10.1.13 NORON (13h): Normal Display Mode On NORON (Normal Display Mode On) Inst / Para D/CX D17-8 NORON ↑ (13h) Parameter No Parameter -This command returns the display to normal mode. -Normal display mode on means Partial mode off.
  • Page 97 ST7735R 10.1.14 INVOFF (20h): Display Inversion Off IVNOFF (Normal Display Mode Off) Inst / Para D/CX D17-8 INVOFF ↑ (20h) Parameter No Parameter -This command is used to recover from display inversion mode. (Example) “-“ Don’t care Memory Display T op-Left...
  • Page 98 ST7735R 10.1.15 INVON (21h): Display Inversion On IVNOFF (Display Inversion On) Inst / Para D/CX D17-8 INVON ↑ (21h) Parameter No Parameter -This command is used to enter into display inversion mode -To exit from Display Inversion On, the Display Inversion Off command (20h) should be written.
  • Page 99 ST7735R 10.1.16 GAMSET (26h): Gamma Set GAMSET (Gamma Set) Inst / Para D/CX D17-8 GAMSET ↑ (26h) Parameter ↑ -This command is used to select the desired Gamma curve for the current display. A maximum of 4 curves can be selected.
  • Page 100 ST7735R 10.1.17 DISPOFF (28h): Display Off DISPOFF (Display Off) Inst / Para D/CX D17-8 DISPOFF ↑ (28h) Parameter No Parameter - This command is used to enter into DISPLAY OFF mode. In this mode, the output from Frame Memory is disabled and blank page inserted.
  • Page 101 ST7735R 10.1.18 DISPON (29h): Display On DISPON (Display On) Inst / Para D/CX D17-8 ↑ DISPON (29h) Parameter No Parameter - This command is used to recover from DISPLAY OFF mode. - Output from the Frame Memory is enabled. - This command makes no change of contents of frame memory.
  • Page 102 ST7735R 10.1.19 CASET (2Ah): Column Address Set CASET(Column Address Set)_ Inst / Para D/CX D17-8 CASET(2Ah) ↑ (2Ah) parameter ↑ XS15 XS14 XS13 XS12 XS11 XS10 parameter ↑ parameter ↑ XE15 XE14 XE13 XE12 XE11 XE10 parameter ↑ -The value of XS [7:0] and XE [7:0] are referred when RAMWR command comes.
  • Page 103 ST7735R Flow Chart V0.2 2009-08-05...
  • Page 104 ST7735R 10.1.20 RASET (2Bh): Row Address Set RASET (Row Address Set) Inst / Para D/CX D17-8 RASET (2Bh) ↑ (2Bh) parameter ↑ YS15 YS14 YS13 YS12 YS11 YS10 parameter ↑ parameter ↑ YE15 YE14 YE13 YE12 YE11 YE10 parameter ↑...
  • Page 105 ST7735R CASET Legend Command 1st parameter XS[15:0] 2nd parameter XE[15:0] Parameter PASET Display 1st parameter YS[15:0] Flow Chart Action 2nd parameter YE[15:0] Mode RAMWR Sequential transter Image Data D1[7:0],D2[7:0] …….Dn[7:0] Any Command V0.2 2009-08-05...
  • Page 106 ST7735R 10.1.21 RAMWR (2Ch): Memory Write RAMWR (Memory Write) Inst / Para D/CX D17-8 RAMWR ↑ (2Ch) 1st parameter ↑ D17-8 ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ ↑ Nth parameter ↑ D17-8 In all color modes, there is no restriction on length of parameters.
  • Page 107 ST7735R 10.1.22 RGBSET (2Dh): Color Setting for 4K, 65K and 262K RGBSET (Color Set for 4K, 65K, 262K and 16.7M) Inst / Para D/CX D17-8 RGBSET ↑ (2Dh) 1st parameter ↑ R005 R004 R003 R002 R001 R000 ∣ ↑ Rnn5...
  • Page 108 ST7735R 10.1.23 RAMRD (2Eh): Memory Read RAMHD (Memory Read) Inst / Para D/CX D17-8 RAMHD ↑ (2Eh) parameter ↑ parameter ↑ D17-8 ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ ∣ ↑ (N+1)th parameter ↑ D17-8 -This command is used to transfer data from frame memory to MCU.
  • Page 109 ST7735R 10.1.24 PTLAR (30h): Partial Area PTLAR (Partial Area) Inst / Para D/CX RDX D17-8 PTLAR ↑ (30h) 1st parameter ↑ PSL15 PSL14 PSL13 PSL12 PSL11 PSL10 PSL9 PSL8 2nd parameter ↑ PSL7 PSL6 PSL5 PSL4 PSL3 PSL2 PSL1 PSL0 3rd parameter ↑...
  • Page 110 ST7735R Flow Chart V0.2 2009-08-05...
  • Page 111 ST7735R 10.1.25 TEOFF (34h): Tearing Effect Line OFF TEOFF (Tearing Effect Line OFF) Inst / Para D/CX D17-8 TEOFF ↑ (34h) Parameter No Parameter -This command is used to turn OFF (Active Low) the Tearing Effect output signal from the TE signal line.
  • Page 112 ST7735R 10.1.26 TEON (35h): Tearing Effect Line ON TEON (Tearing Effect Line ON) Inst / Para D/CX D17-8 TEON ↑ (35h) Parameter ↑ -This command is used to turn ON the Tearing Effect output signal from the TE signal line.
  • Page 113 ST7735R 10.1.27 MADCTL (36h): Memory Data Access Control MADCTL (Memory Data Access Control) Inst / Para D/CX D17-8 ↑ MADCTL (36h) Parameter ↑ -This command defines read/ write scanning direction of frame memory. NAME DESCRIPTION Row Address Order These 3bits controls MCU to memory Column Address Order write/read direction.
  • Page 114 ST7735R Top-left (0, 0) Top-left (0, 0) Memory Memory ML="0" ML="1" Top-left (0, 0) Top-left (0, 0) Display Display Status Default Value Power On Sequence MY=0,MX=0,MV=0,ML=0,RGB=0,MH=0 Default S/W Reset No Change H/W Reset MY=0,MX=0,MV=0,ML=0,RGB=0,MH=0 Legend Command MADCTL Parameter Display Flow Chart...
  • Page 115 ST7735R 10.1.28 IDMOFF (38h): Idle Mode Off IDMOFF (Idle Mode Off) Inst / Para D/CX D17-8 IDMOFF ↑ (38h) Parameter No Parameter -This command is used to recover from Idle mode on. -In the idle off mode, Description 1. LCD can display 4096, 65k or 262k colors.
  • Page 116 ST7735R 10.1.29 IDMON (39h): Idle Mode On IDMON (Idle Mode On) Inst / Para D/CX D17-8 IDMOFF ↑ (39h) Parameter No Parameter -This command is used to enter into Idle mode on. -There will be no abnormal visible effect on the display mode change transition.
  • Page 117 ST7735R Legend Command Idle off mode Parameter Display IDMON Flow Chart Idle on mode Action Mode Sequential transter V0.2 2009-08-05...
  • Page 118 ST7735R 10.1.30 COLMOD (3Ah): Interface Pixel Format COLMOD (3Ah): Interface Pixel Format Inst / Para D/CX D17-8 COLMOD ↑ (3Ah) Parameter ↑ IFPF2 IFPF1 IFPF0 This command is used to define the format of RGB picture data, which is to be transferred via the MCU interface.
  • Page 119 ST7735R 10.1.31 RDID1 (DAh): Read ID1 Value RDID1 (Read ID1 Value) Inst / Para D/CX D17-8 RDID1 ↑ (DAh) 1st parameter ↑ 2nd parameter ↑ ID17 ID16 ID15 ID14 ID13 ID12 ID11 ID10 -This read byte returns 8-bit LCD module’s manufacturer ID...
  • Page 120 ST7735R 10.1.32 RDID2 (DBh): Read ID2 Value RDID2 (Read ID2 Value) Inst / Para D/CX D17-8 RDID2 ↑ (DBh) parameter ↑ parameter ↑ ID26 ID25 ID24 ID23 ID22 ID21 ID20 -This read byte returns 8-bit LCD module/driver version ID -The 1st parameter is dummy data...
  • Page 121 ST7735R 10.1.33 RDID3 (DCh): Read ID3 Value RDID3 (Read ID2 Value) Inst / Para D/CX D17-8 RDID3 ↑ (DCh) parameter ↑ parameter ↑ ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30 -This read byte returns 8-bit LCD module/driver ID. -The 1st parameter is dummy data Description -The 2nd parameter (ID37 to ID30): LCD module/driver ID.
  • Page 122 ST7735R 10.2 Panel Function Command List and Description Table 10.2.1 Panel Function Command List (1) Instruction Refer D/CX WRX RDX D23-8 D7 Function In normal mode (B1h) ↑ (Full colors) ↑ RTNA3 RTNA2 RTNA1 RTNA0 FRMCTR1 10.2.1 RTNA set 1-line period ↑...
  • Page 123 ST7735R Table 10.2.2 Panel Function Command List (2) Function Instruction Refer D/CX WRX RDX D17-8 (C0h) Power control setting ↑ AVDD[ AVDD[ AVDD VRHP VRHP VRHP VRHP VRHP ↑ PWCTR1 10.2.5 VRH: Set the GVDD VRHN VRHN VRHN VRHN VRHN ↑...
  • Page 124 ST7735R Table 10.2.3 Panel Function Command List (3) Function Instruction Refer D/CX WRX RDX D17-8 Customer Project ↑ (D2h) code WRID3 10.2.13 Set the project code ↑ ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30 at ID3 ↑ (D9) NVM control status NVCTR1 10.2.14...
  • Page 125 ST7735R Table 10.2.4 Panel Function Command List (4) Instruction Refer D/CX WRX RDX D17-8 D7 Hex Function (E0h) Set ↑ Gamma ↑ VRFP[5] VRFP[4] VRFP[3] VRFP[2] VRFP[1] VRF0P[0] adjustment ↑ VOS0P[5] VOS0P[4] VOS0P[3] VOS0P[2] VOS0P[1] VOS0P[0] (+ polarity) ↑ PKP0[5]...
  • Page 126 ST7735R 10.2.1 FRMCTR1 (B1h): Frame Rate Control (In normal mode/ Full colors) FRMCTR1 (Frame Rate Control) Inst / Para D/CX D17-8 FRMCTR1 ↑ (B1h) parameter ↑ RTNA3 RTNA2 RTNA1 RTNA0 parameter ↑ FPA5 FPA4 FPA3 FPA2 FPA1 FPA0 parameter ↑...
  • Page 127 ST7735R 10.2.2 FRMCTR2 (B2h): Frame Rate Control (In Idle mode/ 8-colors) FRMCTR2 (Frame Rate Control) Inst / Para D/CX D17-8 FRMCTR2 ↑ (B2h) parameter ↑ RTNB3 RTNB2 RTNB1 RTNB0 parameter ↑ FPB5 FPB4 FPB3 FPB2 FPB1 FPB0 parameter ↑ BPB5...
  • Page 128 ST7735R 10.2.3 FRMCTR3 (B3h): Frame Rate Control (In Partial mode/ full colors) FRMCTR3 (Frame Rate Control) Inst / Para D/CX D17-8 FRMCTR3 ↑ RTNC RTNC RTNC RTNC parameter ↑ parameter ↑ FPC5 FPC4 FPC3 FPC2 FPC1 FPC0 parameter ↑ BPC5...
  • Page 129 ST7735R 10.2.4 INVCTR (B4h): Display Inversion Control INVCTR (Display Inversion Control) Inst / Para D/CX D17-8 INVCTR ↑ (B4h) Parameter ↑ -Display Inversion mode control -NLA: Inversion setting in full colors normal mode (Normal mode on) Inversion setting in full Colors normal mode...
  • Page 130 ST7735R 10.2.5 PWCTR1 (C0h): Power Control 1 PWCTR1 (Power Control 1) Inst / Para D/CX D17-8 PWCTR1 ↑ (C0h) parameter ↑ AVDD[2] AVDD[1] AVDD[0] VRHP4 VRHP3 VRHP2 VRHP1 VRHP0 parameter ↑ VRHN4 VRHN3 VRHN2 VRHN1 VRHN0 parameter ↑ MODE[1] MODE[0]...
  • Page 131 ST7735R Status Availability Normal Mode On, Idle Mode Off, Sleep Out Register Normal Mode On, Idle Mode On, Sleep Out Availability Partial Mode On, Idle Mode Off, Sleep Out Partial Mode On, Idle Mode On, Sleep Out Sleep In Status...
  • Page 132 ST7735R 10.2.6 PWCTR2 (C1h): Power Control 2 PWCTR2 (Power Control 2) Inst / Para D/CX WRX RDX D17-8 PWCTR2 ↑ (C1h) parameter ↑ VGH25[1] VGH25[0] VGLSEL[1] VGLSEL[0] VGHBT[1] VGHBT[0] -Set the VGH and VGL supply power level VGH25[1:0] VGHBT[1:0] 2*AVDD+VGH25...
  • Page 133 ST7735R Flow Chart V0.2 2009-08-05...
  • Page 134 ST7735R 10.2.7 PWCTR3 (C2h): Power Control 3 (in Normal mode/ Full colors) PWCTR3 (Power Control 3) Inst / Para D/CX D17-8 PWCTR3 ↑ (C2h) parameter ↑ DCA9 DCA8 SAPA2 SAPA1 SAPA0 APA2 APA1 APA0 parameter ↑ DCA7 DCA6 DCA5 DCA4...
  • Page 135 ST7735R Flow Chart V0.2 2009-08-05...
  • Page 136 ST7735R 10.2.8 PWCTR4 (C3h): Power Control 4 (in Idle mode/ 8-colors) PWCTR4 (Power Control 4) Inst / Para D/CX D17-8 PWCTR4 ↑ (C3h) parameter ↑ DCB9 DCB8 SAPB2 SAPB1 SAPB0 APB2 APB1 APB0 parameter ↑ DCB7 DCB6 DCB5 DCB4 DCB3...
  • Page 137 ST7735R Flow Chart V0.2 2009-08-05...
  • Page 138 ST7735R 10.2.9 PWCTR5 (C4h): Power Control 5 (in Partial mode/ full-colors) PWCTR5 (Power Control 5) Inst / Para D/CX D17-8 PWCTR5 ↑ (C4h) parameter ↑ DCC9 DCC8 SAPC2 SAPC1 SAPC0 APC2 APC1 APC0 parameter ↑ DCC7 DCC6 DCC5 DCC4 DCC3...
  • Page 139 ST7735R Legend Command Parameter PWCTR5 Display Flow Chart 1st Parameter Action 2nd parameter Mode Sequential transter V0.2 2009-08-05...
  • Page 140 ST7735R 10.2.10 VMCTR1 (C5h): VCOM Control 1 VMCTR1 (VCOM Control 1) Inst / Para D/CX D17-8 VMCTR1 ↑ (C5h) parameter ↑ VCOMS5 VCOMS 4 VCOMS 3 VCOMS 2 VCOMS 1 VCOMS 0 VCOM voltage setting. VCOMS VCOMS VCOMS VCOMS VCOM...
  • Page 141 ST7735R Flow Chart V0.2 2009-08-05...
  • Page 142 ST7735R 10.2.11 VMOFCTR (C7h): VCOM Offset Control VMOFCTR (VCOM Offset Control) Inst / Para D/CX D17-8 VMOFCTR ↑ (C7h) Parameter ↑ VMF4 VMF3 VMF2 VMF1 VMF0 -Set VCOM Voltage level for reduce the flicker issue -Before use command 0xC7, the bit VMF_EN of command 0xD9 must be enabled (set to 1).
  • Page 143 ST7735R 10.2.12 WRID2 (D1h): Write ID2 Value WRID2 (Write ID2 Value) Inst / Para D/CX D17-8 WRID2 ↑ (D1h) Parameter ↑ ID26 ID25 ID24 ID23 ID22 ID21 ID20 -Write 7-bit data of LCD module version to save it to NVM.
  • Page 144 ST7735R 10.2.13 WRID3 (D2h): Write ID3 Value WRID3 (Write ID3 Value) Inst / Para D/CX D17-8 WRID3 ↑ (D2h) ↑ Parameter ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30 -Write 8-bit data of project code module to save it to NVM.
  • Page 145 ST7735R 10.2.14 NVFCTR1 (D9h): NVM Control Status NVFCTR1 (NV Memory Function Controller 1) Inst / Para D/CX D17-8 NVFCTR1 ↑ (D9h) parameter ↑ VMF_EN ID2_EN EXT_R -NVM control status Value VMF_EN “1” = Command C7h enable ; “0” = Command C7h disable...
  • Page 146 ST7735R 10.2.15 NVFCTR2 (DEh): NVM Read Command NVFCTR1 (NV Memory Function Controller 2) Inst / Para D/CX D17-8 NVFCTR2 ↑ (DEh) parameter ↑ parameter ↑ NVM Read Command Description NOTE: “-“ Don’t care Flow Chart V0.2 2009-08-05...
  • Page 147 ST7735R 10.2.16 NVFCTR3 (DFh): NVM Write Command NVFCTR1 (NV Memory Function Controller 3 Inst / Para D/CX WRX RDX D17-8 NVFCTR1 ↑ (DFh) parameter ↑ NVM_CMD7 NVM_CMD6 NVM_CMD5 NVM_CMD4 NVM_CMD3 NVM_CMD2 NVM_CMD1 NVM_CMD0 parameter ↑ -NVM Write Command -NVM_CMD[7:0] : Select to Program/Erase ; Program command : 3Ah ; Erase command : C5h Description NOTE: “-“...
  • Page 148 ST7735R 10.2.17 GMCTRP1 (E0h): Gamma (‘+’polarity) Correction Characteristics Setting GMCTRP0 (Gamma ‘+’polarity Correction Characteristics Setting) Inst / Para D/CX WRX RDX D17-8 D7 GMCTRP1 ↑ (E0h) parameter ↑ VRF0P[5] VRF0P[4] VF0P[3] VRF0P[2] VRF0P[1] VRF0P[0] parameter ↑ VOS0P[5] VOS0P[4] VOS0P[3] VOS0P[2]...
  • Page 149 ST7735R Flow Chart V0.2 2009-08-05...
  • Page 150 ST7735R 10.2.18 GMCTRN1 (E1h): Gamma ‘-’polarity Correction Characteristics Setting GMCTRP0 (Gamma ‘+’polarity Correction Characteristics Setting) Inst / Para D/CX WRX RDX D17-8 D7 GMCTRP1 ↑ (E1h) parameter ↑ VRF0N[5] VRF0N[4] VF0N[3] VRF0N[2] VRF0N[1] VRF0N[0] parameter ↑ VOS0N[5] VOS0N[4] VOS0N[3] VOS0N[2]...
  • Page 151 ST7735R Legend Command Parameter GMCTRN1 Display Flow Chart 1st Parameter Action 2nd Parameter Mode Sequential transter V0.2 2009-08-05...
  • Page 152 ST7735R 11 Power Structure 11.1 Driver IC Operating Voltage Specification Fig 11.1.1 Power Booster Level V0.2 2009-08-05...
  • Page 153 ST7735R 11.2 Power Booster Circuit Source Output Circuit Block S 396 REGP Reference Gray reference Voltage AVDD Circuit Block generator ( Gamma ) Vci1 AVDD REGP GVDD REGP AGND AGND AVCL REGP Charge Pump 1 VCOM AVDD AVDD AGND Vci1...
  • Page 154 ST7735R 11.2.1 EXTERNAL COMPONENTS CONNECTION Rated (Min) Typical Pad Name Connection Voltage capacitance value AVDD Connect to Capacitor: AVDD -------||-------- GND 6.3V 1.0 uF AVCL Connect to Capacitor: AVCL -------||-------- GND 6.3V 1.0 uF V0.2 2009-08-05...
  • Page 155 ST7735R 12 Gamma structure 12.1 TRUCTURE OF GRAYSCALE AMPLIFIER 16 voltage levels (VIN0-VIN15) between GVDD and VSS are determined by the high/ mid/ low level adjustment registers. Each mid-adjustment level is split into 64 levels again by the internal ladder resistor network. As a result, grayscale amplifier generates 64 voltage levels ranging from V0 to V63 and outputs one of 64 levels.
  • Page 156 ST7735R VINP8 VINP8 V36-(V36-V44)*(4/32) V36-(V36-V44)*(4/32) V36-(V36-V44)*(8/32) V36-(V36-V44)*(8/32) V36-(V36-V44)*(12/32) V36-(V36-V44)*(12/32) V36-(V36-V44)*(16/32) V36-(V36-V44)*(16/32) V36-(V36-V44)*(20/32) V36-(V36-V44)*(20/32) V36-(V36-V44)*(24/32) V36-(V36-V44)*(24/32) V36-(V36-V44)*(28/32) V36-(V36-V44)*(28/32) VINP9 VINP9 V44-(V44-V52)*(4/32) V44-(V44-V52)*(4/32) V44-(V44-V52)*(8/32) V44-(V44-V52)*(8/32) V44-(V44-V52)*(12/32) V44-(V44-V52)*(12/32) V44-(V44-V52)*(16/32) V44-(V44-V52)*(16/32) V44-(V44-V52)*(20/32) V44-(V44-V52)*(20/32) V44-(V44-V52)*(24/32) V44-(V44-V52)*(24/32) V44-(V44-V52)*(28/32) V44-(V44-V52)*(28/32) VINP10 VINP10 V52-(V52-V56)*(1/4) V52-(V52-V56)*(1/4) V52-(V52-V56)*(2/4) V52-(V52-V56)*(2/4) V52-(V52-V56)*(3/4)
  • Page 157 ST7735R 13 Example Connection with Panel direction and Different Resolution 13.1 Application of connection with panel direction Case 1: (This is default case) Pixel is at Left Top of the panel - RGB filter order = RGB 1st pixel IC (Bump down)
  • Page 158 ST7735R Case 3: Pixel is at Right Bottom of the panel - RGB filter order = RGB IC (Bump down) CF Glass LCD Front side 1st pixel TFT Glass Case 4: Pixel is at Right Bottom of the panel - RGB filter order = BGR...
  • Page 159 ST7735R 13.2 Application of connection with Different resolution Case1 of Resolution (128RGB x 160) (GM[1:0] = “11”) RAM size=128 x 160 x 18-bit (Used) Display size = 128RGB x 160 1). Example for SMX=SMY=’0’ Driver IC (bump down) G161 S390...
  • Page 160 ST7735R Case2 of Resolution (132RGB x 162) (GM[1:0] = “00”) RAM size=132 x 162 x 18-bit (Used) Display size = 132RGB x 162 1). Example for SMX=SMY=’0’ 2). Example for SMX=SMY=’1’ V0.2 2009-08-05...
  • Page 161 ST7735R 13.3 Microprocessor Interface applications 13.3.1 8080-Series MCU Interface for 8-bit data bus (P68=0, IM2, IM1, IM0=”100”) 80 Serial MPU 8-Bit Bus VDDI ST7735R SPI4W RESX RESX D/CX D/CX (SCL) RDX (E) WRX (R/WX) D7 to D0 D7 to D0 D17 to D8 13.3.2 8080-Series MCU Interface for 16-bit data bus (P68=0, IM2, IM1, IM0=”101”)
  • Page 162 ST7735R 13.3.4 8080-Series MCU Interface for 18-bit data bus (P68=0, IM2, IM1, IM0=”111”) 80 Serial MPU 18-Bit Bus VDDI ST7735R SPI4W RESX RESX D/CX D/CX (SCL) RDX (E) WRX (R/WX) D17 to D0 D17 to D0 13.3.5 6800-Series MCU Interface for 8-bit data bus (P68=1, IM2, IM1, IM0=”100”)
  • Page 163 ST7735R 13.3.7 6800-Series MCU Interface for 9-bit data bus (P68=1, IM2, IM1, IM0=”110”) 68 Serial MPU 9-Bit Bus VDDI ST7735R SPI4W RESX RESX D/CX D/CX (SCL) RDX (E) R/WX WRX (R/WX) D8 to D0 D7 to D0 D17 to D9 VDDI 13.3.8 6800-Series MCU Interface for 18-bit data bus (P68=1, IM2, IM1, IM0=”111”)
  • Page 164 ST7735R 14 Revision History ST7735R Specification Revision History Version Date Description First issue. V0.1 2009/07/10 Modify VGH, VGL PAD location (P7) Add TESEL pin description. (P16) V0.2 2009/08/05 Modify command DFh (P147) Modify AVDD range 4.5~5.1 (P152) V0.2 2009-08-05...