Configuration Example; Mcu Debug Component (Dbgmcu); Debug Support For Low-Power Modes; Debug Support For Timers, Watchdog, Bxcan And I C - ST STM32F101xx Reference Manual

Advanced arm-based 32-bit mcus
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Debug support (DBG)
31.15.4

Configuration example

To output a simple value to the TPIU:
Configure the TPIU and enable the I/IO_TRACEN to assign TRACE IOs in the XL- and
high-density device's debug configuration register.
Write 0xC5ACCE55 to the ETM Lock Access Register to unlock the write access to the
ITM registers
Write 0x00001D1E to the control register (configure the trace)
Write 0000406F to the Trigger Event register (define the trigger event)
Write 0000006F to the Trace Enable Event register (define an event to start/stop)
Write 00000001 to the Trace Start/stop register (enable the trace)
Write 0000191E to the ETM Control Register (end of configuration)
31.16

MCU debug component (DBGMCU)

The MCU debug component helps the debugger provide support for:
Low-power modes
Clock control for timers, watchdog, I2C and bxCAN during a breakpoint
Control of the trace pins assignment
31.16.1

Debug support for low-power modes

To enter low-power mode, the instruction WFI or WFE must be executed.
The MCU implements several low-power modes which can either deactivate the CPU clock
or reduce the power of the CPU.
The core does not allow FCLK or HCLK to be turned off during a debug session. As these
are required for the debugger connection, during a debug, they must remain active. The
MCU integrates special means to allow the user to debug software in low-power modes.
For this, the debugger host must first set some debug configuration registers to change the
low-power mode behavior:
In Sleep mode, DBG_SLEEP bit of DBGMCU_CR register must be previously set by
the debugger. This will feed HCLK with the same clock that is provided to FCLK
(system clock previously configured by the software).
In Stop mode, the bit DBG_STOP must be previously set by the debugger. This will
enable the internal RC oscillator clock to feed FCLK and HCLK in STOP mode.
31.16.2
Debug support for timers, watchdog, bxCAN and I
During a breakpoint, it is necessary to choose how the counter of timers and watchdog
should behave:
They can continue to count inside a breakpoint. This is usually required when a PWM is
controlling a motor, for example.
They can stop to count inside a breakpoint. This is required for watchdog purposes.
For the bxCAN, the user can choose to block the update of the receive register during a
breakpoint.
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Doc ID 13902 Rev 12
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