ST STM32F101xx Reference Manual page 1084

Advanced arm-based 32-bit mcus
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Revision history
Table 232. Document revision history (continued)
Date
Revision
22-May-2008
4
continued
continued
28-Jul-2008
5
1084/1096
Figure 234: CAN frames on page 648
TX mailbox identifier register (CAN_TIxR) (x=0..2) on page
modified in
CAN receive FIFO mailbox identifier register (CAN_RIxR) (x=0..1) on
page
664.
Section 26.3.7: DMA requests on page 743
in
Section 26.6.2: Control register 2 (I2C_CR2) on page
Clock phase and clock polarity on page 679
modified.
Receive sequence on page 682
modified.
Underrun flag (UDR) on page 714
2
I
S feature added (see
Section 25: Serial peripheral interface (SPI) on page
In
Section 31: Debug support (DBG) on page
DBGMCU_IDCODE on page 1055
– TMC TAP changed to boundary scan TAP
– Address onto which DBGMCU_CR is mapped modified in
configuration register on page
Section 30: Device electronic signature on page 1045
REV_ID(15:0) definition modified in
Developed polynomial form updated in
Figure 4: Power supply overview on page 66
Section 5.1.2: Battery backup domain on page 67
Section 7.2.5: LSI clock on page 93
Section 9.1.4: Alternate functions (AF) on page 157
Note added to
Table 45: TIM2 alternate function remapping on page
Bits are write-only in
Section 13.4.2: DMA interrupt flag clear register (DMA_IFCR) on
page
274.
Register name modified in
Recommended sampling time given in
Bit attributes modified in
Note modified for bits 23:0 in
on page
234.
Note added in
Section 12.2: DAC main features on page
Formula updated in
Section 12.3.5: DAC output voltage on page
DBL[4:0] description modified in
synchronization on page
Figure 82 on page 300
and
Section 25.5.3: SPI status register (SPI_SR) on page 720
Closing the communication on page 735
Notes added to
Section 26.6.8: Clock control register (I2C_CCR) on page
replaced by T
in
Section 26.6.8
PCLK1
OVR changed to ORE in
Section 27.6.1: Status register (USART_SR) on page 792
Slave select (NSS) pin management on page 678
Small text changes.
Doc ID 13902 Rev 12
Changes
modified. Bits 31:21 and bits 20:3 modified in
modified. DMAEN bit 11 description modified
modified.
added.
modified.
1048:
and
DBGMCU_CR on page 1069
1069.
Section 31.6.1: MCU device ID code on page
Section 4.2: CRC main features on page
modified.
specified.
Section 11.3.1: ADC on-off control on page
Section 11.10: Temperature sensor on page
Section 11.12.1: ADC status register (ADC_SR) on page
Section 11.12.4: ADC sample time register 1 (ADC_SMPR1)
Section 14.3.19: TIMx and external trigger
317.
Figure 128 on page 366
updated.
and
Section
Figure 300: USART interrupt mapping diagram on page
661. Bits 31:21 and bits 20:3
749.
Transmit sequence on page 681
Reception sequence on page 713
updated
Section 31.16.3: Debug MCU
added.
modified.
clarified.
173.
209.
243.
247.
modified.
modified.
26.6.9.
updated.
clarified.
RM0008
CAN
674).
1055.
62.
225.
227.
756. TCK
791.

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