Pulse Deviation Clear Mode; Position Integral Compensation - Delta ASD-B2-0121-B User Manual

Chapter 7 Servo Parameters
P2 - 50 DCLR
Default: 0
Applicable Control Mode: PT
Unit: N/A
Range: 0 ~ 2
Data Size: 16-bit
Display Format: Hexadecimal
Settings:
For digital input function (DI function), please refer to Table 7.A.
This pulse deviation clear function is enabled when a digital input is set to pulse
clear function (CCLR mode, DI (Digital Input) setting value is 0x04). When this
input is triggered, the position accumulated pulse number will be clear to 0.
(available in PT mode only)
0: CCLR is triggered by rising-edge
1: CCLR is triggered bu level
P2 - 51 Reserved (Do Not Use)
P2 - 52 Reserved (Do Not Use)
P2 - 53 KPI
Default: 0
Applicable Control Mode: ALL
Unit: rad/s
Range: 0 ~ 1023
Data Size: 16-bit
Display Format: Decimal
Settings:
This parameter is used to set the integral time of position loop. When the value of
position integral compensation is increased, it can decrease the position control
deviation. However, if the setting value is over high, it may generate position
overshoot or noise.
P2 - 54 Reserved (Do Not Use)
P2 - 55 Reserved (Do Not Use)
P2 - 56 Reserved (Do Not Use)
P2 - 57 Reserved (Do Not Use)
P2 - 58 Reserved (Do Not Use)
7-62

Pulse Deviation Clear Mode

Position Integral Compensation

Address: 0264H, 0265H
Related Section: N/A
Address: 026AH, 026BH
Related Section:
Section 6.3.6
Revision June 2010