Ppc Bus Latency; Table 3-5. Ppc60X Originated Latency Matrix - Motorola MVME2400 Series Installation And Use Manual

PPC Bus Latency

The following tables list the latency of PPC originated transactions and the
bandwidth of originated transactions for five different clock ratios: 5:2,
3:2, 3:1, 2:1, and 1:1. The MVME2400 uses a 3:1 clock ratio:

Table 3-5. PPC60x Originated Latency Matrix

Transaction
Beat Beat
1
Burst Read 40 1
Burst Write 5 1
Single Read 22 -
Single Write 5 -
Burst Read 26 1
Burst Write 5 1
Single Read 16 -
Single Write 5 -
Burst Read 45 1
Burst Write 5 1
Single Read 24 -
Single Write 5 -
Burst Read 33 1
Burst Write 5 1
Single Read 19 -
Single Write 5 -
Burst Read 20 1
Burst Write 5 1
Single Read 13 -
Single Write 5 -
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32-bit PCI
Beat Beat
Total
2 3 4
1 1 43
1 1 8
- - 22
- - 5
1 1 29
1 1 8
- - 16
- - 5
1 1 48
1 1 8
- - 24
- - 5
1 1 36
1 1 8
- - 19
- - 5
1 1 23
1 1 8
- - 13
- - 5
64-bit PCI
Beat Beat Beat Beat
1 2 3
29 1 1 1
5 1 1 1
- - - -
- - - -
20 1 1 1
5 1 1 1
- - - -
- - - -
33 1 1 1
5 1 1 1
- - - -
- - - -
25 1 1 1
5 1 1 1
- - - -
- - - -
16 1 1 1
5 1 1 1
- - - -
- - - -
Block Diagram
Clock
Ratio
Total
4
32 5:2
8
-
-
23 3:2
8
-
-
36 3:1
8
-
-
28 2:1
8
-
-
19 1:1
8
-
-
3-9
3