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8.2.3 Panel/Monitor Configuration Registers
Panel Type Register
REG[02h]
n/a
n/a
bits 5-4
Panel Data Width Bits [1:0]
bit 3
bit 2
bit 1
bit 0
MOD Rate Register
REG[03h]
n/a
n/a
bits 5-0
S1D13504
X19A-A-002-18
Panel Data
Panel Data
Width Bit 1
Width Bit 0
Panel Data Width Bits [1:0]
These bits select passive LCD/TFT panel data width size.
Table 8-3: Panel Data Width Selection
Passive LCD Panel Data
00
01
10
11
Panel Data Format Select
When this bit = 1, 8-bit single color passive LCD panel data format 2 is selected. This bit must be
set to 0 for all other LCD panel formats.
Color/Mono Panel Select
When this bit = 1, color passive LCD panel is selected. When this bit = 0, monochrome passive
LCD panel is selected.
Dual/Single Panel Select
When this bit = 1, dual passive LCD panel is selected. When this bit = 0, single passive LCD panel
is selected.
Setting this bit for single panel mode should be done only when the Half Frame Buffer is idle. The
Half Frame Buffer is idle during vertical non-display periods or while in suspend mode. For
programming information, see S1D13504 Programming Notes and Examples, document number
X19A-G-002-xx.
TFT/Passive LCD Panel Select
When this bit = 1, TFT panel is selected. When this bit = 0, passive LCD panel is selected.
MOD Rate Bit
MOD Rate Bit
5
4
MOD Rate Bits [5:0]
For a non-zero value these bits specify the number of FPLINE between toggles of the MOD output
signal. When these bits are all 0's the MOD output signal toggles every FPFRAME. These bits are
for passive LCD panels only.
Panel Data
Color/Mono
Format Select
Panel Select
TFT Panel Data Width Size
Width Size
4-bit
8-bit
16-bit
Reserved
MOD Rate Bit
MOD Rate Bit
3
2
Epson Research and Development
Vancouver Design Center
TFT/Passive
Dual/Single
LCD Panel
Panel Select
Select
9-bit
12-bit
16-bit
Reserved
MOD Rate Bit
MOD Rate Bit
1
0
Hardware Functional Specification
Issue Date: 01/01/30
RW
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