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Epson Research and Development
Vancouver Design Center
GPIO Status / Control Register 1
REG[21h]
GPO
n/a
Control
bit 7
bit 3
bit 2
bit 1
bit 0
Hardware Functional Specification
Issue Date: 01/01/30
n/a
n/a
GPO Control
This bit is used to control the state of the SUSPEND# pin when it is configured as GPO. The SUS-
PEND# pin can be used as a power-down input (SUSPEND#) or as an output (GPO) possibly used
for controlling the LCD backlight power:
• When MD9 = 0 at rising edge of RESET#, SUSPEND# is an active-low Schmitt input used to
put the S1D13504 into suspend mode - see Section 13, "Power Save Modes" on page 128 for
details.
• When MD[10:9] = 01 at rising edge of RESET#, SUSPEND# is an output with a reset state of 1.
• When MD[10:9] = 11 at rising edge of RESET#, SUSPEND# is an output with a reset state of 0.
When this bit = 0 the GPO output is set to the reset state. When this bit = 1 the GPO output pin is
set to the inverse of the reset state.
GPIO11 Pin IO Status
When GPIO11 is configured as an output, a "1" in this bit drives GPIO11 to high and a "0" in this
bit drives GPIO11 to low. When GPIO11 is configured as an input, a read from this bit returns the
status of GPIO11. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO11,
otherwise the VRTC pin is controlled automatically and this bit will have no effect on hardware.
GPIO10 Pin IO Status
When GPIO10 is configured as an output, a "1" in this bit drives GPIO10 to high and a "0" in this
bit drives GPIO10 to low. When GPIO10 is configured as an input, a read from this bit returns the
status of GPIO10. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO10,
otherwise the HRTC pin is controlled automatically and this bit will have no effect on hardware.
GPIO9 Pin IO Status
When GPIO9 is configured as an output, a "1" in this bit drives GPIO9 to high and a "0" in this bit
drives GPIO9 to low. When GPIO9 is configured as an input, a read from this bit returns the status
of GPIO9. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO9, other-
wise the DACRS1 pin is controlled automatically and this bit will have no effect on hardware.
GPIO8 Pin IO Status
When GPIO8 is configured as an output, a "1" in this bit drives GPIO8 to high and a "0" in this bit
drives GPIO8 to low. When GPIO8 is configured as an input, a read from this bit returns the status
of GPIO8. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO8, other-
wise the DACRS0 pin is controlled automatically and this bit will have no effect on hardware.
GPIO11 Pin
GPIO10 Pin
IO Status
IO Status
Page 107
RW
GPIO9 Pin
GPIO8 Pin
IO Status
IO Status
S1D13504
X19A-A-002-18
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