Display Buffer; Table 9-1: S1D13504 Addressing; Figure 9-1: Display Buffer Addressing - Epson S1D13504 Technical Manual

Page 114

9 Display Buffer

CS#
0
0
1
S1D13504
X19A-A-002-18
The system addresses the display buffer through the CS#, M/R#, and AB[20:0] input pins. When
CS# = 0 and M/R# = 1, the display buffer is addressed by bits AB[20:0] as shown in the following
table.

Table 9-1: S1D13504 Addressing

M/R#
Register access:
• REG[00h] is addressed when AB[5:0] = 0
0
• REG[01h] is addressed when AB[5:0] = 1
• REG[n] is addressed when AB[5:0] = n
Memory access: the 2M byte display buffer is addressed by
1
AB[20:0]
X
S1D13504 not selected
The display buffer address space is always 2M bytes. However, the physical display buffer may be
either 512K bytes or 2M bytes. See Section 5.5, "Summary of Configuration Options" on page 31.
The 512K byte display buffer is replicated in the 2M byte address space as shown below.
512K byte Memory
Image Buffer
Half-Frame Buffer
Image Buffer
Half-Frame Buffer
Image Buffer
Half-Frame Buffer
Image Buffer
Half-Frame Buffer

Figure 9-1: Display Buffer Addressing

The display buffer will contain an image buffer and may also contain a half-frame buffer.
Access
AB[20:0] 2M byte Memory
000000h
07FFFFh
080000h
0FFFFFh
100000h
17FFFFh
180000h
Half-Frame Buffer
1FFFFFh
Epson Research and Development
Vancouver Design Center
Image Buffer
Hardware Functional Specification
Issue Date: 01/01/30