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7.1.3 MC68K Bus 2 Interface Timing (e.g. MC68030)
CLK
A[20:0]
SIZ[1:0] M/R#
CS#
AS#
DS#
R/W#
DSACK1#
D[31:16](write)
D[31:16](read)
S1D13504
X19A-A-002-18
t1
t2
t3
t4
t7
t9
t11
t13
Figure 7-3: MC68K Bus 2 Interface Timing
Epson Research and Development
Vancouver Design Center
t5
t6
t16
t8
t10
t12
t15
t14
Hardware Functional Specification
Issue Date: 01/01/30