Epson S1D13504 Technical Manual page 467

Epson Research and Development
Vancouver Design Center
Table 3-1: Generic MPU Host Bus Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . 10
Table 4-1: Summary of Power-On/Reset Options . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4-2: Host Bus Interface Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 2-1: PC Card Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2-2: PC Card Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4-1: Typical Implementation of PC Card to S1D13504 Interface . . . . . . . . . . . . . . . . 12
Interfacing to the PC Card Bus
Issue Date: 01/02/02
List of Tables
List of Figures
Page 5
9
S1D13504
X19A-G-009-05