Epson S1D13504 Technical Manual page 110

Color graphics lcd/crt controller
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bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
S1D13504
X19A-A-002-18
GPIO5 Pin IO Configuration
When this bit = 1, GPIO5 is configured as an output. When this bit = 0 (default), GPIO5 is config-
ured as an input. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO5,
otherwise the BLANK# pin is controlled automatically and this bit will have no effect on hardware.
GPIO4 Pin IO Configuration
When this bit = 1, GPIO4 is configured as an output. When this bit = 0 (default), GPIO4 is config-
ured as an input. Note the MD8 pin must be high at the rising edge of RESET# to enable GPIO4,
otherwise the DACRD# pin is controlled automatically and this bit will have no effect on hardware.
GPIO3 Pin IO Configuration
When this bit = 1, GPIO3 is configured as an output. When this bit = 0 (default), GPIO3 is config-
ured as an input. Note the MD[7:6] pins must be properly configured at the rising edge of RESET#
to enable GPIO3, otherwise the MA9 pin is controlled automatically and this bit will have no effect
on hardware.
GPIO2 Pin IO Configuration
When this bit = 1, GPIO2 is configured as an output. When this bit = 0 (default), GPIO2 is config-
ured as an input. Note the MD[7:6] pins must be properly configured at the rising edge of RESET#
to enable GPIO2, otherwise the MA11 pin is controlled automatically and this bit will have no
effect on hardware.
GPIO1 Pin IO Configuration
When this bit = 1, GPIO1 is configured as an output. When this bit = 0 (default), GPIO1 is config-
ured as an input. Note the MD[7:6] pins must be properly configured at the rising edge of RESET#
to enable GPIO1, otherwise the MA10 pin is controlled automatically and this bit will have no
effect on hardware.
GPIO0 Pin IO Configuration
When this bit = 1, GPIO0 is configured as an output. When this bit = 0 (default), GPIO0 is config-
ured as an input.
Epson Research and Development
Vancouver Design Center
Hardware Functional Specification
Issue Date: 01/01/30

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