Epson S1D13504 Technical Manual page 29

Epson Research and Development
Vancouver Design Center
Pin Name Type
F00A
F01A
WE1# I 9
M/R# I 5
CS# I 4
BUSCLK I 108
BS# I 6
RD/WR# I 10
RD# I 7
Hardware Functional Specification
Issue Date: 01/01/30
Table 5-1: Host Interface Pin Descriptions (Continued)
Pin #
Reset =
Driver
0 Value
F02A
11 CS Hi-Z
7 C Hi-Z
6 C Hi-Z
122 C Hi-Z
8 CS Hi-Z
12 CS Hi-Z
9 CS Hi-Z
Description
This pin has multiple functions.
• For SH-3 mode, this pin inputs the write enable signal for the
upper data byte (WE1#).
• For MC68K Bus 1, this pin inputs the upper data strobe
(UDS#).
• For MC68K Bus 2, this pin inputs the data strobe (DS#).
• For Generic Bus, this pin inputs the write enable signal for the
upper data byte (WE1#).
See Table 5-9: "Host Bus Interface Pin Mapping," on page 32.
This input pin is used to select between the memory and register
address spaces of the S1D13504. M/R# is set high to access the
memory and low to access the registers. See Section 8.1,
"Register Mapping" on page 90 .
See Table 5-9: "Host Bus Interface Pin Mapping," on page 32.
Chip select input. See Table 5-9: "Host Bus Interface Pin
Mapping," on page 32.
System bus clock. See Table 5-9: "Host Bus Interface Pin
Mapping," on page 32.
This pin has multiple functions.
• For SH-3 mode, this pin inputs the bus start signal (BS#).
• For MC68K Bus 1, this pin inputs the address strobe (AS#).
• For MC68K Bus 2, this pin inputs the address strobe (AS#).
• For Generic Bus, this pin must be tied to IO V
See Table 5-9: "Host Bus Interface Pin Mapping," on page 32.
This pin has multiple functions.
• For SH-3 mode, this pin inputs the RD/WR# signal. The
S1D13504 needs this signal for early decode of the bus cycle.
• For MC68K Bus 1, this pin inputs the R/W# signal.
• For MC68K Bus 2, this pin inputs the R/W# signal.
• For Generic Bus, this pin inputs the read command for the
upper data byte (RD1#).
See Table 5-9: "Host Bus Interface Pin Mapping," on page 32.
This pin has multiple functions.
• For SH-3 mode, this pin inputs the read signal (RD#).
• For MC68K Bus 1, this pin must be tied to IO V
• For MC68K Bus 2, this pin inputs the bus size bit 1 (SIZ1).
• For Generic Bus, this pin inputs the read command for the
lower data byte (RD0#).
See Table 5-9: "Host Bus Interface Pin Mapping," on page 32.
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S1D13504
X19A-A-002-18