S1D13504 Hardware Configuration - Epson S1D13504 Technical Manual

Epson Research and Development
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4.2 S1D13504 Hardware Configuration

S1D13504
Pin Name
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
Interfacing to the Motorola MC68328 "Dragonball" Microprocessor
Issue Date: 01/02/02
The S1D13504 latches MD15 through MD0 to allow selection of the bus mode and other
configuration data on the rising edge of RESET#. Table 4-2 shows the settings used for the
S1D13504 in these interfaces. MD1, MD2, and MD3 should be set to select either
MC68000 Bus 1 mode or Generic bus mode as desired. The other settings are identical for
either bus mode.
Table 4-1: Summary of Power-On/Reset Options
value on this pin at rising edge of RESET# is used to configure:(1/0)
8-bit host bus interface
See "Host Bus Selection" table below
Little Endian
Wait# signal is active high
See "Memory Configuration" table below
Configure DACRD#, BLANK#, DACP0,
DACWR#, DACRS0, DACRS1, HRTC,
VRTC as GPIO4-11
Configure SUSPEND# pin as GPO output
Active low (On) LCDPWR / GPO polarity
Reserved
Reserved
Reserved
Reserved
Reserved
= required settings for MC68328 support.
Table 4-2: S1D13504 Host Bus Selection
MD3 MD2 MD1
0 0 0
0 0 1
0 1 0
0 1 1
1 x x
= required settings for MC68328 support.
1
16-bit host bus interface
See "Host Bus Selection" table below
Big Endian
Wait# signal is active low
See "Memory Configuration" table below
Configure DACRD#, BLANK#, DACP0,
DACWR#, DACRS0, DACRS1, HRTC, VRTC
as DAC / CRT outputs
Configure SUSPEND# pin as Hardware
Suspend Enable
Active high (On) LCDPWR / GPO polarity
Option
1 SH-3 bus interface
2 MC68K bus 1 interface (e.g. MC68000)
3 MC68K bus 2 interface (e.g. MC68030)
4 Generic bus interface (e.g. MC68328, ISA bus interface)
5 Reserved
0
Host Bus Interface
X19A-G-013-02
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S1D13504