Test Software; Source Code - Epson S1D13504 Technical Manual

Page 20

4.6 Test Software

4.6.1 Source Code

BR4 equ
OR4 equ
MemStart equ
DisableReg equ
RevCodeReg equ
Start mfspr
andis.
andis.
oris
ori
stw
andis.
oris
ori
stw
andis.
oris
stb
Loop lbz
b
end
S1D13504
X19A-G-010-05
The test software used to exercise this interface is very simple. It carries out the following
functions:
1. Configures chip select 4 on the MPC821 to map the S1D13504 to an unused 4M byte
block of address space.
2. Loads the appropriate values into the option register for CS4.
3. Enables the S1D13504 host bus interface by writing the value 0 to REG[1Bh].
At that point the software runs in a tight loop which reads the S1D13504 Revision Code
Register REG[00h]. This allows monitoring of the bus timing on a logic analyzer.
This source code for the following test routine was entered into the memory of the
MPC821ADS using the line-by-line assembler in MPC8BUG (the debugger provided with
the ADS board). It was run on the ADS and a logic analyzer was used to verify operation
of the interface hardware.
$120
$124
$40
$1b
0
r1,IMMR
r1,r1,$ffff
r2,r0,0
r2,r2,MemStart
r2,r2,$0801
r2,BR4(r1)
r2,r0,0
r2,r2,$ffc0
r2,r2,$0708
r2,OR4(r1)
r1,r0,0
r1,r1,MemStart
r1,DisableReg(r1) ; write 0 to disable register
r0,RevCodeReg(r1) ; read revision code into r1
Loop
; CS4 base register
; CS4 option register
; upper word of S1D13504 start address
; address of S1D13504 Disable Register
; address of Revision Code Register
; get base address of internal registers
; clear lower 16 bits to 0
; clear r2
; write base address
; port size 16 bits; select GPCM; enable
; write value to base register
; clear r2
; address mask – use upper 10 bits
; normal CS negation; delay CS ½ clock;
; inhibit burst
; write to option register
; clear r1
; point r1 to start of S1D13504 mem space
; branch forever
Interfacing to the Motorola MPC821 Microprocessor
Epson Research and Development
Vancouver Design Center
Issue Date: 01/02/02