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ATM Operation
Adding ATM Errors
Adding ATM Errors
Description
Errors can be added to the ATM payload and to the cell headers. To stress ATM
header alignment, you can add bursts of single or double header errors. To simulate
ATM impairments, you can add bit errors, cell loss, cell misinsertion or cell errors.
Cell loss may be caused by transmission errors on the ATM header or more
importantly may arise due to congestion in ATM switches. Cell misinsertion may
also be caused by transmission errors on the ATM overhead. If errors cause the VP/
VC to be changed to another valid value, this will cause a cell to be misinserted into
another channel. Also, faults within the routing tables or management system of an
ATM switch may cause cells to be routed to the wrong output port, appearing as
misinserted cell. Cell errors caused by transmission impairments or faults within
Network Equipment need to be measured in a different way from bit errors to ensure
that lost or misinserted cells do not corrupt the measurement.
In order to make the necessary ATM measurements a different kind of test signal
than that traditionally used to measure BER is required. This test signal is known as
the test cell and has been designed and endorsed by the ATM Forum and
standardized in the ITU-T in Recommendation 0.191. OmniBER uses the test cell to
make simultaneous ATM error measurements.
How to
1 Set up the
Payloads " page 154).
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page for ATM (See "Setting up the Transmitter for ATM
TRANSMIT
167
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